Language: Chinese
A7 A 7 A-7 AMBA ARM AXI3 AXI4 AXI4-Lite Artix7 Artix 7 Artix-7 IP integrator K7 K 7 K-7 Kintex7 Kintex 7 Kintex-7 This core connects one or more AXI memory-mapped master devices to one or more memory-mapped slave devices. UltraScale UltraScale+ V7 V 7 V-7 Virtex7 Virtex 7 Virtex-7 Vivado XDC Zynq-7000 ds768
Published: Nov 16, 2017
Description:
This core connects one or more AXI memory-mapped master devices to one or more memory-mapped slave devices.