SCHMITT TRIGGER CIRCUIT USING MOS TRANSISTORS AND HAVING CONSTANT ...
未知
CMOS射频集成电路分析与设计 清华池保勇
Using the Python API to Develop Process Portable PyCells
Inc. Synopsys
Temperature in EMX
kapur
Enhanced phase noise modeling of fractional-N frequency synthesizers
H. Arora;N. Klemmer;J.C. Morizio;P.D. Wolf
A 10b 100MS/s 1.13mW SAR ADC with binary-scaled error compensation
Chun-Cheng Liu & Soon-Jyh Chang & Guan-Ying Huang & Ying-Zu Lin & Chung-Ming Huang & Chih-Hao Huang & Linkai Bu & Chih-Chung Tsai
CMOS-Voltage-Refe[..]
4<8=8AB@0B>@
ADS基础与低噪放设计
kj3
Xilinx DS534, FIR Compiler v5.0, Data Sheet
Xilinx, Inc.
Digital Logic and Computer Design
M. MORRIS MANO
超标量处理器设计 (姚永斌) (z-lib.org)
Spectre Circuit Simulator RF Analysis Library Reference
Inc. Cadence Design Sys tems
Parallel Sparse Direct Solver for Integrated Circuit Simulation ...
高频高速电子系统中的信号完整性研究
Fundamentals of Digital Logic with Verilog Design, THIRD EDITION
Stephen Brown & Zvonko Vranesic
CMOS Sigma-Delta Converters Practical Design Guide
数字信号处理的FPGA实现(第3版[..]
0071509054.pdf
在线作Bode/Nyquis
yzx
哈尔滨工业大学硕士毕业论文模板
yinhf
CN101140511B-硅谷数模[..] carry binary adder
CN101969305B-威盛电子[..] conversion circuit
CN106656160A-上海集成[..]
ELKHOLY-DISSERTAT[..]
HJ-MASH 多模多标准CMOS锁相环频率综合器[..] 史鹏鹏
Jish
Noise and Spur Comparison of Delta-Sigma Modulators in Fractional-N ...
Bo Zhou & Yao Li & Fuyuan Zhao
Scaling <formula formulatype="inli[..] Notation="TeX">$L[..] ...
Shih-An Yu & Peter R. Kinget
The Delta-Sigma Modulator [A Circuit for All Seasons]
Behzad Razavi
学校代码： 10246
tcheng
参考书 芯片接口库IO LIBRARY和ESD电路的研发设计应用 (OCR) 王国立
Analog Behavioral Modeling with the Verilog-A Language
基准电压源和线性稳压器的设计-ta[..]
lmliu
基准源和温度检测模块设计-tang[..]
zwtang
CMOS 带隙基准源研究-tangzhangwen
全差分运算放大器设计-tangzh[..]
chwtang
OPAMP设计-tangzhangwen
Zhangwen Tang
LDO设计-tangzhangwen
二级密勒补偿运算放大器
Ray
Michiel Steyaert CMOS CELLULAR RECEIVER FRONT-ENDS
相位噪声、通行链路预算
Understanding Phase Noise in LC VCOs
A Key Problem in RF Integrated Circuits
S_Para_E.PM6
Dz@PMAN-PC2
Pages from M.E. Van Valkenburg - Network Analysis 6(1959, Prentice ...
libgen.lc-2
PoleZero.dvi
Dynamic Response of Linear Systems Impact of Pole & Zero Locations
功率谱密度计算
ADI 技术指南合集
德州仪器高性能模拟器件高效应用指南[..] 大学计划
Texas Instruments, Incorporated [ZHCP055,*]
芯片I／O缓冲及ESD电路设计
eetop.cn Matching
ESD in Silicon Integrated Circuits
柯明道ESD简洁版
zju
Virtuoso Editing 的使用简介
Richey
基于CMOS工艺的全芯片ESD保护[..]
esd-circuits-and-[..]
A mixed-mode esd protection circuit simulation-design methodology ...
CMOS电路芯片ESD保护电路设计[..] 赵近
Abraham uta GPIO ESD
Administrator
ESD Design and Synthesis (1)
CN104601160B-灿芯半导[..]
FPGA 全芯片 ESD 防护设计和优化
USER
DDR3存储器接口电路的设计与实现[..]
模拟集成电路设计与仿真-何乐年
Edward
Design Procedures for Three-Stage CMOS OTAs With Nested-Miller ...
Power supply rejection ratio in operational transconductance ...
IEEE
CMOS高性能运算放大器研究与设计
Design techniques for cascoded CMOS op amps with improved PSRR ...
D.B. Ribner & M.A. Copeland
NoiseDesign.dvi
Advanced Opamp Topologies (Part II)
Michael H. Perrott
MOSAmpNoise.dvi
MIPI高速数据接口的研究与实现
Advanced Opamp Topologies
A 25Gb/s PAM4 Transmitter in 90nm CMOS SOI
Author
A 76 dB 1.7 GHz 0.18 m CMOS Tunable TIA Using Broadband Current ...
Hossein Miri Lavasani & Wanling Pan & Brandon Harrington & Reza Abdolvand & Farrokh Ayazi
Internal and external op-amp compensation: a control-centric ...
A fast-settling CMOS op amp for SC circuits with 90-dB DC gain
K. Bult;G.J.G.M. Geelen
Distributed Loss-Compensation Techniques for Energy-Efficient ...
The Biquadratic Filter [A Circuit for All Seasons]