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CMOS Mixed-Signal Circuit Design, 2nd Ed

CMOS Mixed-Signal Circuit Design, 2nd Ed

ISSCC2021 Session 15

ISSCC2021 Session 15

Dynamic Analysis of Switching-Mode DC DC Converters-Springer Netherlands (1991)

Dynamic Analysis of Switching-Mode DC DC Converters-Springer ...

(EE) Razavi, Design of Analog CMOS Integrated Circuits 2nd

(EE) Razavi, Design of Analog CMOS Integrated Circuits 2nd

模拟集成电路设计与仿真

模拟集成电路设计与仿真

一款轨到轨输入输出运算放大器的设计与研究辛国松

一款轨到轨输入输出运算放大器的设计与研究辛国松

THE DESIGN OF MASTER-SLAVE DLL FOR DDR2 SDRAM CONTROLLER IN PHY

THE DESIGN OF MASTER-SLAVE DLL FOR DDR2 SDRAM CONTROLLER IN ...

Gabriel Rincon-Mora - Analog IC Design with Low-Dropout Regulators (LDOs) (Electronic Engineering) (2009)

Gabriel Rincon-Mora - Analog IC Design with Low-Dropout Regulators ...

Analog IC Design & Low-Dropout Regulators (LDOs) (Electronic Engineering) (2009) ...

CN106357266B-华为2016-锁定检测电路、方法及锁相电路-带offset电流

CN106357266B-华为20[..]

高效率boost DCDC电源管理芯片设计技术研究

高效率boost DCDC电源管理芯片设计技术研究

hfss3dlayout

hfss3dlayout

Analog Circuit Design Volume 3 Design Note Collection

Analog Circuit Design Volume 3 Design Note Collection

Bob Dobkin, Jim Williams

反馈运算放大器电路的噪声分析和设计

反馈运算放大器电路的噪声分析和设计

Xilinx DS558, LogiCORE IP DDS Compiler v4.0, Data Sheet

Xilinx DS558, LogiCORE IP DDS Compiler v4.0, Data Sheet

A 1.5-V, 1.5-GHz CMOS Low Noise Amplifier - Solid-State Circuits, IEEE Journal of

A 1.5-V, 1.5-GHz CMOS Low Noise Amplifier - Solid-State Circuits, ...

CMOS-Voltage-References-An-Analytical-and-Practical-Perspective

CMOS-Voltage-Refe[..]

Advanced Opamp Topologies

Advanced Opamp Topologies

Michael H. Perrott

锁相环相位噪声与环路带宽的关系分析

锁相环相位噪声与环路带宽的关系分析

Books

A 1.5-V, 1.5-GHz CMOS Low Noise Amplifier - Solid-State Circuits, IEEE Journal of

A 1.5-V, 1.5-GHz CMOS Low Noise Amplifier - Solid-State Circuits, ...

The Design of Low-Noise Bandgap References - Circuits and Systems I: Fundamental Theory and Applications, IEEE Transactions on

The Design of Low-Noise Bandgap References - Circuits and Systems ...

A precise on-chip voltage generator for a gigascale dram with a negative word-line scheme - Solid-State Circuits, IEEE Journal of

A precise on-chip voltage generator for a gigascale dram with ...

CMOS Schmitt trigger design - Circuits and Systems I: Fundamental Theory and Applications, IEEE Transactions on

CMOS Schmitt trigger design - Circuits and Systems I: Fundamental ...

A 3.3-V 12-b 50-MS/s A/D converter in 0.6-/spl mu/m CMOS with over 80-dB SFDR - Solid-State Circuits, IEEE Journal of

A 3.3-V 12-b 50-MS/s A/D converter in 0.6-/spl mu/m CMOS with ...

High-Speed Architecture for a Programmable Frequency Divider and a Dual-Modulus Prescaler - Solid-State Circuits, IEEE Journal of

High-Speed Architecture for a Programmable Frequency Divider ...

Low-Jitter Process-Independent DLL and PLL Based on Self-Biased Techniques [Paper] - Solid-State Circuits, IEEE Journal of

Low-Jitter Process-Independent DLL and PLL Based on Self-Biased ...

Striving for small-signal stability - IEEE Circuits and Devices Magazine

Striving for small-signal stability - IEEE Circuits and Devices ...

A High-swing Cmos Telescopic Operational Amplifier - Solid-State Circuits, IEEE Journal of

A High-swing Cmos Telescopic Operational Amplifier - Solid-State ...

Power supply rejection ratio in operational transconductance amplifiers - Circuits and Systems, IEEE Transactions on

Power supply rejection ratio in operational transconductance ...

A compact power-efficient 3 V CMOS rail-to-rail input/output operational amplifier for VLSI cell lib - Solid-State Circuits, IEEE Journal of

A compact power-efficient 3 V CMOS rail-to-rail input/output ...

Intel® Quartus® Prime Standard Edition User Guide Platform Designer

Intel® Quartus® Prime Standard Edition User Guide Platform Designer

Intel Corporation

Embedded Design Handbook

Embedded Design Handbook

Intel Corporation

Avalon® Interface Specifications

Avalon® Interface Specifications

Intel Corporation

Intel® Arria® 10 and Intel® Cyclone® 10 GX Avalon®-MM Interface for PCI Express* User Guide

Intel® Arria® 10 and Intel® Cyclone® 10 GX Avalon®-MM Interface ...

Intel Corporation

Triple-Speed Ethernet Intel® FPGA IP User Guide

Triple-Speed Ethernet Intel® FPGA IP User Guide

Intel Corporation

Nios II Processor Reference Guide

Nios II Processor Reference Guide

Intel Corporation

AN 812: Platform Designer System Design Tutorial

AN 812: Platform Designer System Design Tutorial

Intel Corporation

Embedded Peripherals IP User Guide

Embedded Peripherals IP User Guide

Intel Corporation

Design of class AB output stages using the structural methodology

Design of class AB output stages using the structural methodology

V. Ivanov & I. Filanovsky

Microsoft PowerPoint - lect.08.RFSimulation [호환 모드]

Microsoft PowerPoint - lect.08.RFSimulation [호환 모드]

比较器失调的仿真方法

比较器失调的仿真方法

Fundamentals of Layout Design for Electronic Circuits

Fundamentals of Layout Design for Electronic Circuits

Jens Lienig Juergen Scheible

Microsoft Word - 异步FIFO的设计.doc

Microsoft Word - 异步FIFO的设计.doc

电路设计仿真

电路设计仿真

Delta-sigma dac设计和分析

Delta-sigma dac设计和分析

Delta-sigma ADC

Delta-sigma ADC

HJ-MASH 多模多标准CMOS锁相环频率综合器中小数分频器的设计史鹏鹏

HJ-MASH 多模多标准CMOS锁相环频率综合器[..] 史鹏鹏

高效率峰值电流模BOOST型DC-DC转换器的研究与设计-徐锦里2016

高效率峰值电流模BOOST型DC-[..]

Digital Control of Dyanmic Systems 3rd ed - G. Franklin, J. Powell, M. Workman (A-W, 1998) WW.djvu

Digital Control of Dyanmic Systems 3rd ed - G. Franklin, J. ...

射频集成电路

射频集成电路

Network Analysis and Feedback Amplifier Design 12th ed - H. Bode (Van Nostrand, 1945) WW.djvu

Network Analysis and Feedback Amplifier Design 12th ed - H. ...

Digital Integrated Circuits Analysis and Design

Digital Integrated Circuits Analysis and Design

BesserWM35.vp:CorelVentura 7.0

BesserWM35.vp:Cor[..] 7.0

USB2.0协议中文版

USB2.0协议中文版

Advanced Electromagnetic Computation

Advanced Electromagnetic Computation

Dikshitulu K. Kalluri

Temperature in EMX

Temperature in EMX

Front Cover Circuit Analysis I.qxd (Page 1)

Front Cover Circuit Analysis I.qxd (Page 1)

Karris, Steven T.

introduction.ppt

introduction.ppt

Kluwer - The Designer's Guide to Spice and Spectre.tif

Kluwer - The Designer's Guide to Spice and Spectre.tif

MT-001: Taking the Mystery out of the Infamous Formula,'SNR = 6.02N + 1.76dB,' and Why You Should Care

MT-001: Taking the Mystery out of the Infamous Formula,'SNR ...

PowerManagmentIC

PowerManagmentIC

A low-power small-area /spl plusmn/7.28-ps-jitter 1-GHz DLL-based clock generator

A low-power small-area /spl plusmn/7.28-ps-ji[..] 1-GHz DLL-based ...

Chulwoo Kim & In-Chul Hwang & Sung-Mo Kang

ADS基础与低噪放设计

ADS基础与低噪放设计

AMBA总线规范_V2.0

AMBA总线规范_V2.0

LINUX设备驱动程序

LINUX设备驱动程序

Jonathan Corbet，Alessandro Rubini，Greg Kroah-Hartman著；魏永明，耿岳，钟书毅译

finite elemennt anlysis in ansys

finite elemennt anlysis in ansys

Accurate and Rapid Measurement of IP2 and IP3

Accurate and Rapid Measurement of IP2 and IP3

Introduction to RF Simulation and its Application

Introduction to RF Simulation and its Application

Simulating Switched-Capacitor Filters with SpectreRF

Simulating Switched-Capacitor Filters with SpectreRF

Modeling Jitter in PLL-based Frequency Synthesizers

Modeling Jitter in PLL-based Frequency Synthesizers

SSReader Print.

SSReader Print.

IEEE Std 802.11ac™-2013, IEEE Standard for Information technology—Telecommunications and information exchange between systems—Local and metropolitan area networks—Specific requirements—Part 11: Wireless LAN Medium Access Control (MAC) and Physical Layer (PHY) specifications—Amendment 4: Enhancements for Very High Throughput for Operation in Bands below 6 GHz

IEEE Std 802.11ac™-2013, IEEE Standard for Information technology—Teleco[..] ...

LAN/MAN Standards Committee of the IEEE Computer Society

IEEE Standard for Information Technology—Telecommunications and information exchange between systems—LANs and MANs—Specific requirements—Part 11: WLAN MAC and PHY Specifications—Amendment 5: Enhancements for Higher Throughput

IEEE Standard for Information Technology—Teleco[..] and information ...

LAN/MAN Standards Committee of the IEEE Computer Society

IEEE Std 802.11g-2003 [Amendment to IEEE Std 802.11, 1999 Edition (Reaff 2003) as amended by IEEE Stds 802.11a-1999, 802.11b-1999, 802.11b-1999/Cor 1-2001, and 802.11d-2001], Amendment 4: Further Higher Data Rate Extension in the 2.4 GHz Band

IEEE Std 802.11g-2003 [Amendment to IEEE Std 802.11, 1999 Edition ...

LAN/MAN Standards Committee of the IEEE Computer Society

LINEAR SYSTEMS AND SIGNALS

LINEAR SYSTEMS AND SIGNALS

B. P. Lathi & R. A. Green

Electronic Design Automation for IC Implementation, Circuit Design, and Process Technology

Electronic Design Automation for IC Implementation, Circuit ...

Luciano Lavagno & Igor L. Markov & Grant Martin & Louis K. Scheffer

A 76 dB 1.7 GHz 0.18 m CMOS Tunable TIA Using Broadband Current Pre-Amplifier for High Frequency Lateral MEMS Oscillators

A 76 dB 1.7 GHz 0.18 m CMOS Tunable TIA Using Broadband Current ...

Hossein Miri Lavasani & Wanling Pan & Brandon Harrington & Reza Abdolvand & Farrokh Ayazi

Electronic Circuit and System Simulation Methods

Electronic Circuit and System Simulation Methods

Lawrence T. Pillage, Ronald A. Rohrer, Chandramouli Visweswariah

数字信号处理及其matlab实现

数字信号处理及其matlab实现