Session 30: Non-Volatile Memories
未知
PowerManagmentIC
khchen
用于OFDM+UWB系统中的中频滤[..]
德州仪器高性能模拟器件高效应用指南[..] 大学计划
Texas Instruments, Incorporated [ZHCP055,*]
基于全反馈的高稳定性LDO线性稳压器
模拟CMOS集成电路设计 第2版14609998
高性能音频Delta-Sigma数[..]
Charge Pump Circuit Design [Pan, Feng and Samaddar, Tapan] Good ...
CN101140511B-硅谷数模[..] carry binary adder
集成电路静态时序分析与建模
刘峰编著
一种高摆率低功耗无片外电容的LDO设计
ISSCC2021-SC3
CMOS模拟集成电路版图设计与验证 基于Cadence Virtuoso与Mentor Calibre
尹飞飞
参考书 芯片接口库IO LIBRARY和ESD电路的研发设计应用 (OCR) 王国立
CN104601160B-灿芯半导[..]
A comparative study of various current mirror configurations_ ...
Bhawna Aggarwal & Maneesha Gupta & A.K. Gupta
基于自偏置技术的锁相环设计 刘克赛2019
刘克赛
CIRCUIT SIMULATION METHODS and ALGORITHMS
Jan Ogrodzki
2004Beek
2002 Book On-ChipESDProtect[..]
2.7Gbps收发器中LVDS驱动[..]
A 2.7-V 900-MHz CMOS LNA and Mixer - Solid-State Circuits, IEEE ...
IEEE
A 2.488–11.2 Gb/s multi-protocol SerDes in 40nm low-leakage ...
Socrates D. Vamvakos & Claude R. Gauthier & Chethan Rao & Karthisha Ramoshan Canagasaby & Prashant Choudhary & Sanjay Dabral & Shaishav Desai & Mahmudul Hassan & K.C. Hsieh & Bendik Kleveland & Gurupada Mandal & Richard Rouse & Ritesh Saraf & Alvin Wang & Jason Yeung & Khaldoon Abugharbieh & Ying Cao
2-Stage OTA Design
A 2-dB noise figure 900-MHz differential CMOS LNA - Solid-State ...
1V供电的低噪声带隙基准电压源
16位高速CMOS流水线模数转换器[..] (1)
14990665645773625[..]
14984226455248291[..]
12位50Msps流水线A D转换器的研究与设计
12bit pipeline ADC design
A 10b 100MS/s 1.13mW SAR ADC with binary-scaled error compensation
Chun-Cheng Liu & Soon-Jyh Chang & Guan-Ying Huang & Ying-Zu Lin & Chung-Ming Huang & Chih-Hao Huang & Linkai Bu & Chih-Chung Tsai
A 10-bit 50-MS/s SAR ADC With a Monotonic Capacitor Switching ...
Chun-Cheng Liu;Soon-Jyh Chang;Guan-Ying Huang;Ying-Zu Lin
1.5Bit 级pipelined+ADC典型单[..]
A 1.5-V, 1.5-GHz CMOS Low Noise Amplifier - Solid-State Circuits, ...
A 1.24 μA Quiescent Current NMOS Low Dropout Regulator With ...
Raveesh Magod & Bertan Bakkaloglu & Sanjeev Manandhar
A 1 GHz CMOS RF Front-End IC for a Direct-Conversion Wireless ...
04_TechActive.fm
Administrator
0132642786.pdf
Neil H. E. Weste
0071509054.pdf
A 0.92mW 10-bit 50-MS/s SAR ADC in 0.13μm CMOS process
Chun-Cheng Liu & Soon-Jyh Chang & Guan-Ying Huang & Yin-Zu Lin
A 0.775mW 10-bit 40-MS/s SAR ADC in 0.18μm CMOS process
Wenzha Yang & Yi Zhang & Enwen Dai & ZhiLin Feng & Wei Li
A 0.46ps RJ<inf>rms</inf> 5GHz wideband LC PLL for multi-protocol ...
Chethan Rao & Alvin Wang & Shaishav Desai
0-306-47052-7_Boo[..]
(EE) Razavi, Design of Analog CMOS Integrated Circuits 2nd
(Analog Circuits and Signal Processing) Danica Stefanovic, Maher ...
Structu