Spice Modeling and Simulation of a MPPT Algorithm
未知
Huijsing2017 Operational Amplifiers Theory and Design 3rd ed. ...
锁相环(PLL)电路设计与应用
(日)远坂俊昭 著 何希才译
一种基于内部迟滞比较器的新型RC振荡器
TheDesigner’sGuid[..]
一种用于LDO的低功耗带隙基准电压源
Session 35: Adaptive Digital Techniques for Variation Tolerant ...
高速低功耗逐次逼近式ADC研究与实现
一种快速瞬态响应无片外电容LDO
LDO设计小结二
zeng zhen
Design of Sigma-Delta Converters in MATLAB-
CRYSTAL OSCILLATOR WITH PEAK DETECTOR AMPLITUDE CONTROL
一种新型CMOS误差放大电路的设计 来新泉
基于零极点追踪的高稳定性片内LDO[..]
CN101140511B-硅谷数模[..] carry binary adder
RF Matching Workshop
XU,YUE (K-China,ex1)
A 1.24 μA Quiescent Current NMOS Low Dropout Regulator With ...
Raveesh Magod & Bertan Bakkaloglu & Sanjeev Manandhar
Session 24
Virtuoso Editing 的使用简介
Richey
Verilog数字系统设计教程
Verilog数字VLSI设计教程
【作 者】李林编著
VerilogA系统设计与仿真(可[..]
verilog HDL那些事
akuei2
Verilog HDL Design Examples
Joseph Cavanagh
Verification of SD/MMC Controller IP Using UVM
UVM实战(卷Ⅰ)
张强编著
Using the Python API to Develop Process Portable PyCells
Inc. Synopsys
Using ADS to simulate Noise Figure using a large-signal transistor ...
Steve Long
USB2.0协议中文版
Jungle
USB 3.0中五分频电路设计
TOM
USB 3 1 r1.0
mphelps
USB 2.0
hevryjiang
US6380806B1-Diffe[..] telescopic operational amplifier having ...
untitled
UNIX环境高级编程
W.RICHARD STEVENS
Universal Verification Methodology (UVM) Cookbook
Functional Verification Methodology Team - Mentor & A Siemens Business
Universal Serial Bus 3.0 Specification
Understanding Phase Noise in LC VCOs
A Key Problem in RF Integrated Circuits
Understanding Jitter Requirements of PLL-Based Processors Application ...
ANALOG DEVICES INC.
Understanding Jitter and Phase Noise : A Circuits and Systems ...
Nicola Da Dalt; Ali Sheikholeslami & Ali Sheikholeslami
Understanding Delta-Sigma Data Converters 2nd edition
SHANTHI PAVAN, RICHARD SCHREIER & GABOR C. TEMES
Understanding Delta-Sigma Data Converters
Richard Schreier & GABOR C. TEMES
TWO-STAGE FULLY-DIFFERENTIAL OPAMPS
Vishal Home PC
Truly Nonlinear Oscillations: Harmonic Balance, Parameter Expansions, ...
Ronald E. Mickens
TrnoiseAN.fm
mtian
Triple-Speed Ethernet Intel® FPGA IP User Guide
Intel Corporation
Traveling Wave Analysis of Partial Differential Equations Numerical ...
Tradeoffs and Optimization in Analog CMOS Design
David M. Binkley
Totem User Manual 2021R
Topics in Multiple-Loop Regulators and Current-Mode Programming
Topic 8 Circuit Envelope
Rashaunda Henderson
TMTT 202212
TI-运算放大器
TI-CICC2006-A Sub-i V Low-Noise Bandgap Voltage Reference
Three Stages CMOS OpAmp
thesis.dvi
Tempus User Guide
Inc. Cadence Design Sys tems
Temperature in EMX
kapur
TEMPERATURE AND PROCESS (56) COMPENSATED CURRENT REFERENCE CIRCUITS
te.2005.杨氏零点再发现
tcsii.2005.A new modeling and optimization of gain-boosted cascode ...
TCASⅡ 202212
SystemVerilog验证 测试平台编写指南
SystemVerilog 验证方法学 - Verification Methodology Manual for SystemVerilog
Janick Bergeron & Eduard Cemy & Alan Hunter & Andrew Nightingale 著 & 夏宇闻 译
Systematic Design of Analog CMOS Circuits
Synthesis of Arithmetic Circuits : FPGA, ASIC, and Embedded ...
Deschamps & Jean-Pierre. & Bioul & Gery Jean Antoine. & Sutter & Gustavo D.
Synthesis and Optimization of Digital Circuits (Giovanni De ...
Switching Power Supplies A to Z
Sanjaya_Maniktala
Maniktala, Sanjaya.
Sweetspot
Striving for small-signal stability - IEEE Circuits and Devices ...
IEEE
Static timing analysis for nanometer designs a practical approach ...
Static Timing Analysis final
StarRC User Guide and Command Reference
Synopsys, Inc.
Standard Verification Rule Format (SVRF) Manual 2023
Siemens Industry Software
Standard Verification Rule Format (SVRF) Manual 2020
Mentor Graphics Corporation