理工书库 lilin | Category: 2003-01

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ISSCC2021-SC3

ISSCC2021-SC3

Next-Generation ADCs, High-Performance Power Management, and Technology Considerations for Advanced Integrated Circuits Advances in Analog Circu

Next-Generation ADCs, High-Performance Power Management, and ...

SystemVerilog 验证方法学 - Verification Methodology Manual for SystemVerilog

SystemVerilog 验证方法学 - Verification Methodology Manual for SystemVerilog

Janick Bergeron & Eduard Cemy & Alan Hunter & Andrew Nightingale 著 & 夏宇闻译

Elementary Differential Equations and Boundary Value Problems

Elementary Differential Equations and Boundary Value Problems

William E. Boyce & Richard C. Diprima & Douglas B. Meade

A 0.92mW 10-bit 50-MS/s SAR ADC in 0.13μm CMOS process

A 0.92mW 10-bit 50-MS/s SAR ADC in 0.13μm CMOS process

Chun-Cheng Liu & Soon-Jyh Chang & Guan-Ying Huang & Yin-Zu Lin

Universal Verification Methodology (UVM) Cookbook

Universal Verification Methodology (UVM) Cookbook

Functional Verification Methodology Team - Mentor & A Siemens Business

Frontmatter

Frontmatter

VLSI Physical Design: From Graph Partitioning to Timing Closure

VLSI Physical Design: From Graph Partitioning to Timing Closure

Andrew B. Kahng, Jens Lienig, Igor L. Markov, Jin Hu

ISSCC2021-T7-Basic Design Approaches to Accelerating Deep Neural Networks

ISSCC2021-T7-Basic Design Approaches to Accelerating Deep Neural ...

实用开关电源设计

实用开关电源设计

Julia中文文档

Julia中文文档

无电容型LDO的研究现状与进展

无电容型LDO的研究现状与进展

高速流水线模数转换器关键技术研究与芯片设计

高速流水线模数转换器关键技术研究与[..]

CMOS Realization of OTA as an Application in Low Power Amplifier for Enhancing the Performance and Stability using 65 Nm Technology

CMOS Realization of OTA as an Application in Low Power Amplifier ...

Ghanshyam Singh, Md Hameed Pasha

$Enhanced phase noise modeling of fractional-N frequency synthesizers$

Enhanced phase noise modeling of fractional-N frequency synthesizers

H. Arora;N. Klemmer;J.C. Morizio;P.D. Wolf

2-Stage OTA Design

2-Stage OTA Design

电子电路的计算机辅助分析与设计方法.汪蕙

电子电路的计算机辅助分析与设计方法.汪蕙

A 0.46ps RJ<inf>rms</inf> 5GHz wideband LC PLL for multi-protocol 10Gb/s SerDes

A 0.46ps RJ<inf>rms</inf> 5GHz wideband LC PLL for multi-protocol ...

Chethan Rao & Shaishav Desai & Alvin Wang

Category: 2003-01

CMOS Fractional-N Synthesizers: Design for High Spectral Purity and Monolithic Integration (The Springer International Series in Engineering and Computer Science)

CMOS Fractional-N Synthesizers: Design for High Spectral Purity ...

Bram De Muer & Michiel Steyaert