VLSI Physical Design: From Graph Partitioning to Timing Closure
Andrew B. Kahng, Jens Lienig, Igor L. Markov, Jin Hu
高速低功耗SAR ADC的关键技术研究与系统设计
HKF
examples
server1
锁相环型频率综合器中的高速分频器 袁泉
未知
Next-Generation ADCs, High-Performance Power Management, and ...
393747_Print.indd
0009172
Session 7
Low Drop-Out Voltage Regulators: Capacitor-less Architecture ...
Joselyn Torres & Mohamed El-Nozahi & Ahmed Amer & Seenu Gopalraju & Reza Abdullah & Kamran Entesari & Edgar Sanchez-Sinencio
基于斩波技术的CMOS运算放大器失[..]
普林斯顿微积分读本（修订版）
Adrian Banner
低电压CMOS分数分频锁相环频率综合器 关键技术研究
LU HUNG
Session 1: Plenary Session — Invited Papers
ch3_pnjunction
Claudio Talarico
计算电磁学要论 by 盛新庆 (z-lib.org)
CNKI
基于零极点追踪的高稳定性片内LDO[..]
一种LDO使能控制端失效的分析方法
LDO设计-tangzhangwen
Zhangwen Tang
用于低相位噪声LC VCO的低噪声可调LDO的设计
IEEE Std 802.11g-2003 [Amendment to IEEE Std 802.11, 1999 Edition ...
LAN/MAN Standards Committee of the IEEE Computer Society