Microsoft Word - 0TitlePageVbook.doc
VC
一种高性能CMOS带隙电压基准源设计 朱樟明
未知
Cadence高速电路板设计
Design Procedures for Three-Stage CMOS OTAs With Nested-Miller ...
Session 12: Innovations in Low-Power and Secure IoT
SSReader Print.
kxy
Gabriel Rincon-Mora - Analog IC Design with Low-Dropout Regulators ...
Analog IC Design & Low-Dropout Regulators (LDOs) (Electronic Engineering) (2009) ...
德州仪器高性能模拟器件高效应用指南[..] 大学计划
Texas Instruments, Incorporated [ZHCP055,*]
Spectre FX Circuit Simu lator User Guide
Inc. Cadence Design Sys tems
Calibre® DESIGNrev Reference Manual
Siemens Industry Software
Numerical Analysis (Richard L. Burden, J. Douglas Faires etc.) ...
ELKHOLY-DISSERTAT[..]
AXI Interconnect v2.1 LogiCORE IP Product Guide (PG059)
Xilinx, Inc.
PLL频率合成器的杂散性能分析
A 0.46ps RJ<inf>rms</inf> 5GHz wideband LC PLL for multi-protocol ...
Chethan Rao & Shaishav Desai & Alvin Wang
大电流、高稳定性的LDO线形稳压器
基于运算放大器和模拟集成电路的电路[..] with Operational Amplifiers and Analog ...
Sergio Franco 著
简并点优化的高性能带隙基准电路
Xilinx DS249 LogiCORE IP CORDIC v4.0, Data Sheet,
Xilinx DS534, FIR Compiler v5.0, Data Sheet