低功耗的高速高精度运放设计
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Robust Design of LV/LP Low-Distortion CMOS Rail-to-Rail Input ...
Voltus-Fi Hierarchical IR Drop and EM Analysis
Cadence Physical Verifi cation User Guide
Inc. Cadence Design Sys tems
[Behzad Razavi] Phase-Locking in High-Performance (BookFi)
模拟CMOS集成电路设计第一版
python 数值分析
Mirella Misiaszek
现代控制系统 第八版
linhai
Session 24: Advanced Embedded Memories
Abidi-Pan, Hui.University of California, Los Angeles
PCI Express Base r3.0
Next-Generation ADCs, High-Performance Power Management, and ...
Cadence高速电路板设计
半导体物理与器件 （第三版）
（美）尼曼著 赵毅强 姚素英 解晓东等译
高速低功耗逐次逼近式ADC研究与实现
带温度补偿的扩频振荡器研究与设计
Session 17: DC-DC Converters
A 2-dB noise figure 900-MHz differential CMOS LNA - Solid-State ...
Xilinx DS534, FIR Compiler v5.0, Data Sheet
Xilinx, Inc.
Xilinx DS558, LogiCORE IP DDS Compiler v4.0, Data Sheet