Analog Circuit Design Volume 3 Design Note Collection
Bob Dobkin, Jim Williams
1V供电的低噪声带隙基准电压源
未知
基于延迟锁相环的时钟发生器设计
Pyros Interactive Viewer User Guide
Inc. Synopsys
Session 15: Compute-in-Memory Processors for Deep Neural Networks
高效率峰值电流模BOOST型DC-[..]
jlxu
Advanced Opamp Topologies (Part II)
Michael H. Perrott
基于嵌入式密勒补偿技术的LDO放大器设计
Numerical Methods in Engineering with Python (2005)
Session 31: Analog Techniques
Abidi-Pan, Hui.University of California, Los Angeles
A 1.24 μA Quiescent Current NMOS Low Dropout Regulator With ...
Raveesh Magod & Bertan Bakkaloglu & Sanjeev Manandhar
Modified modeling of Miller compensation for two-stage operational ...
H.C. Yang;D.J. Allstot
AMBA AXI Protocol Specification
ARM Limited
Tradeoffs and Optimization in Analog CMOS Design
David M. Binkley
天线（第三版）约翰克劳斯中文高清全本
一种带瞬态响应增强的无电容型LDO
0071509054.pdf
7 Series FPGAs Gen2 Integrated Block for PCIe to AXI4-Lite Bridge ...
Xilinx, Inc.
AXI Memory Mapped to PCI Express (PCIe) Gen2 v2.8 LogiCORE IP ...
A Flexible, Low-Power Analog PLL for SoC and Processors in 14nm ...
Kuan-Yueh Shen & Syed Feruz Syed Farooq & Yongping Fan & Khoa Minh Nguyen & Qi Wang & Mark L. Neidengard & Nasser Kurd & Amr Elshazly
Intel® Arria® 10 and Intel® Cyclone® 10 GX Avalon®-MM Interface ...
Intel Corporation
PCI Express PHY v1.0 LogiCORE IP Product Guide