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Discover (Random Books)

教材:李庆扬数值分析-第五版

教材:李庆扬数值分析-第五版

未知

Generate ESD Source in ADS

Generate ESD Source in ADS

TU,NASH (K-Taiwan,ex1)

Method of Moments for 2D Scattering Problems

Method of Moments for 2D Scattering Problems

Christophe Bourlier

Abraham uta GPIO ESD

Abraham uta GPIO ESD

Administrator

Matching Analysis and  the Design of Low Offset Amplifiers

Matching Analysis and the Design of Low Offset Amplifiers

未知

模拟集成电路设计精粹——Analog Design Essentials

模拟集成电路设计精粹——Analog Design Essentials

Willy M.C. Sansen 著 & 陈莹梅 译 & 王志功 审校

低功率、高分辨率的A-D转换器@2018

低功率、高分辨率的A-D转换器@2018

作者

一种适用于DDR内存驱动的LDO芯片设计

一种适用于DDR内存驱动的LDO芯片设计

未知

CMOS高性能运算放大器研究与设计

CMOS高性能运算放大器研究与设计

未知

Session 4: Processors

Session 4: Processors

未知

Keliu Shu-2005 CMOS PLL Synthesizers Analysis and Design

Keliu Shu-2005 CMOS PLL Synthesizers Analysis and Design

未知

Frequency Reconfigurable mm-Wave Power Amplifier With Active Impedance Synthesis in an Asymmetrical Non-Isolated Combiner: Analysis and Design

Frequency Reconfigurable mm-Wave Power Amplifier With Active ...

Chandrakanth R. Chappidi & Kaushik Sengupta

IEEE Standard for Information Technology—Telecommunications and information exchange between systems—LANs and MANs—Specific requirements—Part 11: WLAN MAC and PHY Specifications—Amendment 5: Enhancements for Higher Throughput

IEEE Standard for Information Technology—Teleco[..] and information ...

LAN/MAN Standards Committee of the IEEE Computer Society

Understanding Jitter Requirements of PLL-Based Processors Application Note (EE-261)

Understanding Jitter Requirements of PLL-Based Processors Application ...

ANALOG DEVICES INC.

芯片漫游指南

芯片漫游指南

未知

简并点优化的高性能带隙基准电路

简并点优化的高性能带隙基准电路

未知

Microsoft PowerPoint - 第十一章 带隙基准 [兼容模式]

Microsoft PowerPoint - 第十一章 带隙基准 [兼容模式]

未知

Precise delay generation using coupled oscillators

Precise delay generation using coupled oscillators

J.G. Maneatis & M.A. Horowitz

Category: AXI4-Lite

7 Series FPGAs Gen2 Integrated Block for PCIe to AXI4-Lite Bridge (XAPP1286)

7 Series FPGAs Gen2 Integrated Block for PCIe to AXI4-Lite Bridge ...

Xilinx, Inc.

AXI Interconnect v2.1 LogiCORE IP Product Guide (PG059)

AXI Interconnect v2.1 LogiCORE IP Product Guide (PG059)

Xilinx, Inc.

JESD204 v7.2 LogiCORE IP Product Guide (PG066)

JESD204 v7.2 LogiCORE IP Product Guide (PG066)

Xilinx, Inc.

Xilinx PG153 LogiCORE IP AXI Quad Serial Peripheral Interface (SPI) v3.1, Product Guide

Xilinx PG153 LogiCORE IP AXI Quad Serial Peripheral Interface ...

Xilinx, Inc.

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