ISSCC2021-T7-Basic Design Approaches to Accelerating Deep Neural ...
未知
数字集成电路电路、系统与设计(第2[..] 拉贝艾(Jan M.Rabaey)、 Anantha Chandrakasan
Amplifiers, Comparators, Multipliers, Filters, and Oscillators; ...
Tertulien Ndjountche
Virtuoso Visualization and Analysis XL User Guide
Inc. Cadence Design Sys tems
A 76 dB 1.7 GHz 0.18 m CMOS Tunable TIA Using Broadband Current ...
Hossein Miri Lavasani & Wanling Pan & Brandon Harrington & Reza Abdolvand & Farrokh Ayazi
Optimum Feedback Amplifier Design For Control Systems
Timothy E. Biesecker
Session 25: DRAM
ISSCC2021-T12-com[..]
数值分析 第五版 (李庆扬 王能超 易大义) (z-lib.org)
A low-power small-area /spl plusmn/7.28-ps-ji[..] 1-GHz DLL-based ...
Chulwoo Kim & In-Chul Hwang & Sung-Mo Kang
比较器失调的仿真方法
jason
A 2.488–11.2 Gb/s multi-protocol SerDes in 40nm low-leakage ...
Socrates D. Vamvakos & Claude R. Gauthier & Chethan Rao & Karthisha Ramoshan Canagasaby & Prashant Choudhary & Sanjay Dabral & Shaishav Desai & Mahmudul Hassan & K.C. Hsieh & Bendik Kleveland & Gurupada Mandal & Richard Rouse & Ritesh Saraf & Alvin Wang & Jason Yeung & Khaldoon Abugharbieh & Ying Cao
DCDC-EECS-2011-94
Virtuoso Editing 的使用简介
Richey
The Design of CMOS Radio-Frequency Integrated Circuits, Second ...
Thomas H. Lee
模拟电路与数字电路
林捷
通信系统中的多采样率信号处理
Session 26V
Introduction to RF Simulation and its Application
Ken Kundert