Session 33
未知
Katsuhiko Ogata
dynstab2/ThePirateBay
Spectre Classic Simula tor, Spectre APS, Spectre X, Spectre ...
Inc. Cadence Design Sys tems
深亚微米FPGA结构与CAD设计 12083165 2
Temperature in EMX
kapur
Power systems-on-chip practical aspects of design (Allard, Bruno) ...
4<8=8AB@0B>@
数字滤波器的MATLAB与FPGA[..]
带使能端及保护电路的LDO设计
模拟集成电路信号完整性中抖动与振铃[..]
数字信号处理及其matlab实现
Lee
Session 3
A 2.488–11.2 Gb/s multi-protocol SerDes in 40nm low-leakage ...
Socrates D. Vamvakos & Claude R. Gauthier & Chethan Rao & Karthisha Ramoshan Canagasaby & Prashant Choudhary & Sanjay Dabral & Shaishav Desai & Mahmudul Hassan & K.C. Hsieh & Bendik Kleveland & Gurupada Mandal & Richard Rouse & Ritesh Saraf & Alvin Wang & Jason Yeung & Khaldoon Abugharbieh & Ying Cao
信号与系统 MATLAB综合实验
Design Procedure for Two-Stage CMOS Transconductance Operational ...
Vivado Design Suite User Guide: Logic Simulation (UG900)
Xilinx, Inc.
Questa Verification IP Data Book
Mentor Graphics Corporation
信号与系统上 第三版
Harmonic Balance Finite Element Method: Applications in Nonlinear ...
Junwei Lu & Xiaojun Zhao & Sotoshi Yamada
A Low-Jitter and Low-Reference-Spur Ring-VCO-Based Switched-Loop ...
Yongsun Lee & Taeho Seong & Seyeon Yoo & Jaehyouk Choi