二级运放建立时间与相位裕度的分析与优化
未知
模拟CMOS电路设计折中与优化
Session 13
锁相环(PLL)电路设计与应用
(日)远坂俊昭 著 何希才译
Advanced Analog Building Blocks
Shen
Numerical Analysis (Richard L. Burden, J. Douglas Faires etc.) ...
Practical RF Circuit Design for Modern Wireless Systems_ Passive ...
Name
Enhanced phase noise modeling of fractional-N frequency synthesizers
H. Arora;N. Klemmer;J.C. Morizio;P.D. Wolf
High-Speed Architecture for a Programmable Frequency Divider ...
IEEE
零点极点
Circuit Simulation by Farid N. Najm (z-lib.org)
FPGA 全芯片 ESD 防护设计和优化
USER
Session 12: Innovations in Low-Power and Secure IoT
openofdm-readthed[..]
普林斯顿概率论读本 (史蒂文.J.米勒 (Steven J. Miller)) (Z-Library)
一种基于广义时间和传递常数的快速分析法 郑立博
CNKI
RF Circuit Design
tromeros
HFSS电磁仿真设计从入门到精通
A Low-Jitter and Low-Reference-Spur Ring-VCO-Based Switched-Loop ...
Yongsun Lee & Taeho Seong & Seyeon Yoo & Jaehyouk Choi