理工书库 lilin | Category: IEEE Journal of Solid-State Circuits;2002;37;11;10.1109/JSSC.2002.803936

Discover (Random Books)

HIGH SPEED AND LOW POWER DYNAMIC LATCH COMPARATOR

HIGH SPEED AND LOW POWER DYNAMIC LATCH COMPARATOR

Calibre® xRC User's Manual

Calibre® xRC User's Manual

Siemens Industry Software

全差分运算放大器设计

全差分运算放大器设计

SystemVerilog 验证方法学 - Verification Methodology Manual for SystemVerilog

SystemVerilog 验证方法学 - Verification Methodology Manual for SystemVerilog

Janick Bergeron & Eduard Cemy & Alan Hunter & Andrew Nightingale 著 & 夏宇闻译

Kendall Su, Analog Filters, 2nd Ed.

Kendall Su, Analog Filters, 2nd Ed.

CMOS Fractional-N Synthesizers: Design for High Spectral Purity and Monolithic Integration (The Springer International Series in Engineering and Computer Science)

CMOS Fractional-N Synthesizers: Design for High Spectral Purity ...

Bram De Muer & Michiel Steyaert

eetop.cn Matching

eetop.cn Matching

asicon.2009.5351450-Enhanced Power Supply Rejection

asicon.2009.53514[..] Power Supply Rejection

$Wideband RF PLL fractional/integer frequency synthesizer with integrated VCOs and LDOs$

Wideband RF PLL fractional/integer frequency synthesizer with ...

STMICROELECTRONICS

Spectre Circuit Simulator Components and Device Models Reference

Spectre Circuit Simulator Components and Device Models Reference

Inc. Cadence Design Sys tems

Physical design essentials an ASIC design implementation perspective (Khosrow Golshan) (z-lib.org)

Physical design essentials an ASIC design implementation perspective ...

Session 20: High-Performance VCOs

Session 20: High-Performance VCOs

信号分析与处理_MATLAB语言及应用

信号分析与处理_MATLAB语言及应用

http://www.pris.edu.cn

Gabriel Rincon-Mora - Analog IC Design with Low-Dropout Regulators (LDOs) (Electronic Engineering) (2009)

Gabriel Rincon-Mora - Analog IC Design with Low-Dropout Regulators ...

Analog IC Design & Low-Dropout Regulators (LDOs) (Electronic Engineering) (2009) ...

AD9635 cn

AD9635 cn

MCU芯片的复位电路与多模式时钟系统设计

MCU芯片的复位电路与多模式时钟系统设计

概率论与数理统计 (同济大学数学系) (Z-Library)

概率论与数理统计 (同济大学数学系) (Z-Library)

基于FPGA的嵌入式图像处理系统设计原魁[译]

基于FPGA的嵌入式图像处理系统设计原魁[译]

Category: IEEE Journal of Solid-State Circuits;2002;37;11;10.1109/JSSC.2002.803936

A low-power small-area /spl plusmn/7.28-ps-jitter 1-GHz DLL-based clock generator

A low-power small-area /spl plusmn/7.28-ps-ji[..] 1-GHz DLL-based ...

Chulwoo Kim & In-Chul Hwang & Sung-Mo Kang