理工书库 lilin | Category: IEEE Journal of Solid-State Circuits;2001;36;3;10.1109/4.910480

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e采样与adc

e采样与adc

CN104601160B-灿芯半导体2017-带ESD的高速输出级

CN104601160B-灿芯半导[..]

Design of Analog CMOS Integrated Circuits

Design of Analog CMOS Integrated Circuits

Fundamentals of Digital Logic with Verilog Design, THIRD EDITION

Fundamentals of Digital Logic with Verilog Design, THIRD EDITION

Stephen Brown & Zvonko Vranesic

CMOS带隙电压基准的误差及其改进陈浩琼

CMOS带隙电压基准的误差及其改进陈浩琼

Convert to PDF

Convert to PDF

Avalon Verification IP Suite User Guide

Avalon Verification IP Suite User Guide

Altera Corporation

A 0.92mW 10-bit 50-MS/s SAR ADC in 0.13μm CMOS process

A 0.92mW 10-bit 50-MS/s SAR ADC in 0.13μm CMOS process

Chun-Cheng Liu & Soon-Jyh Chang & Guan-Ying Huang & Yin-Zu Lin

Design of Analog CMOS Integrated Circuits, Second Edition

Design of Analog CMOS Integrated Circuits, Second Edition

MOSAmpNoise.dvi

MOSAmpNoise.dvi

一种带过温过流过压保护的LDO设计

一种带过温过流过压保护的LDO设计

Radio Frequency Integrated Circuits and Systems

Radio Frequency Integrated Circuits and Systems

7 Series FPGAs Gen2 Integrated Block for PCIe to AXI4-Lite Bridge (XAPP1286)

7 Series FPGAs Gen2 Integrated Block for PCIe to AXI4-Lite Bridge ...

用于LDO稳压器的CMOS基准电压源的设计

用于LDO稳压器的CMOS基准电压[..]

阻抗匹配与史密斯（Smith）圆图：基本原理

阻抗匹配与史密斯（Smith）圆图[..]

PCI Express Base r3.1

PCI Express Base r3.1

Introduction to RF Power Amplifier Design and Simulation (Abdullah E.) (Z-Library)

Introduction to RF Power Amplifier Design and Simulation (Abdullah ...

Session 20

Session 20

Category: IEEE Journal of Solid-State Circuits;2001;36;3;10.1109/4.910480

CMOS DLL-based 2-V 3.2-ps jitter 1-GHz clock synthesizer and temperature-compensated tunable oscillator

CMOS DLL-based 2-V 3.2-ps jitter 1-GHz clock synthesizer and ...

D.J. Foley;M.P. Flynn