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Discover (Random Books)

数值分析(第5版)习题解答

数值分析(第5版)习题解答

未知

EDA与IC设计 CMOS集成电路后端设计与实战

EDA与IC设计 CMOS集成电路后端设计与实战

刘峰编著

相位噪声、通行链路预算

相位噪声、通行链路预算

yzx

NumericalAnalysisWithPython

NumericalAnalysis[..]

未知

DESIGN WITH OPERATIONAL AMPLIFIERS AND

DESIGN WITH OPERATIONAL AMPLIFIERS AND

未知

Using ADS to simulate Noise Figure using a large-signal transistor model

Using ADS to simulate Noise Figure using a large-signal transistor ...

Steve Long

Fundamentals of High Frequency CMOS Analog Integrated Circuits, 2nd Edition

Fundamentals of High Frequency CMOS Analog Integrated Circuits, ...

未知

A Single-Trim CMOS Bandgap Reference With aInaccuracy of0.15% From40C to 125C

A Single-Trim CMOS Bandgap Reference With aInaccuracy of0.15% ...

Guang Ge & Cheng Zhang & Gian Hoogzaad & Kofi A. A. Makinwa

普林斯顿概率论读本 (史蒂文.J.米勒 (Steven J. Miller)) (Z-Library)

普林斯顿概率论读本 (史蒂文.J.米勒 (Steven J. Miller)) (Z-Library)

未知

一种无片外电容LDO的瞬态增强电路设计

一种无片外电容LDO的瞬态增强电路设计

未知

1V供电的低噪声带隙基准电压源

1V供电的低噪声带隙基准电压源

未知

Three Stages CMOS OpAmp

Three Stages CMOS OpAmp

未知

Spectre Circuit Simulator RF Analysis Library Reference

Spectre Circuit Simulator RF Analysis Library Reference

Inc. Cadence Design Sys tems

Session 30

Session 30

未知

An Engineer's Guide to Automated Testing of High-Speed Interfaces

An Engineer's Guide to Automated Testing of High-Speed Interfaces

Hubert Werkmann Jose Moreira

Spectre RelXpert Reli ability Simulator User Guide

Spectre RelXpert Reli ability Simulator User Guide

Inc. Cadence Design Sys tems

PCI Express Base r3.1

PCI Express Base r3.1

Bill Haffner

Synthesis and Optimization of Digital Circuits (Giovanni De Micheli) (z-lib.org)

Synthesis and Optimization of Digital Circuits (Giovanni De ...

未知

Category: the popular two-stage op amp suffers from poor AC power supply rejection to one of the power rails. Two circuits are presented that overcome the power-supply rejection ratio (PSRR) problems of the earlier amplifier: one for virtual ground applications such as switched-capacitor integrators

Design techniques for cascoded CMOS op amps with improved PSRR and common-mode input range

Design techniques for cascoded CMOS op amps with improved PSRR ...

D.B. Ribner & M.A. Copeland

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