COMS集成锁相环电路设计
未知
数字集成电路电路、系统与设计(第2[..] 拉贝艾(Jan M.Rabaey)、 Anantha Chandrakasan
Design of CMOS Phase-Locked Loops: From Circuit Level to Architecture ...
Behzad Razavi
Session 3
7 Series FPGAs Gen2 Integrated Block for PCIe to AXI4-Lite Bridge ...
Xilinx, Inc.
Cancellation of Amplifier Offset and f-Noise An Improved Chopper ...
最优控制理论与应用
Microsoft Word - xx3_apx_ce.doc
Rashaunda Henderson
锁相环型频率综合器中的高速分频器 袁泉
Accurate and Rapid Measurement of IP2 and IP3
Ken Kundert
Operation and Modeling of the MOS Transistor By Tsividis
ISSCC2021-T8-On-Chip Interconnects Basic Concepts, Designs, ...
基于 DLL倍频技术的 1GHz本地振荡器设计 英文 李金城
jrproc.1950.Bothw[..] F.E.-Nyquist Diagrams and the Routh-Hurwitz ...
Microsoft PowerPoint - PLLnoise_jitter02[..] [相容模式]
cwhsu
Python API Reference Manual
Inc. Synopsys
Questa Verification IP Data Book
Mentor Graphics Corporation
芯片I／O缓冲及ESD电路设计
A 240-nA Quiescent Current, 95.8% Efficiency AOT-Controlled ...
Wenbin Huang & Lianxi Liu & Xufeng Liao & Chengzhi Xu & Yonyuan Li