高效率电源管理集成电路设计技术研究
未知
Design of CMOS Phase-Locked Loops: From Circuit Level to Architecture ...
Behzad Razavi
Power Management Techniques for Integrated Circuit Design
Ke-Horng Chen
MT-001: Taking the Mystery out of the Infamous Formula,'SNR ...
Walt Kester
Analog Design Essentials
sansen
Next-Generation ADCs, High-Performance Power Management, and ...
CMOS 带隙基准源研究-tangzhangwen
zwtang
Advanced Opamp Topologies
Michael H. Perrott
一种带软启动电路的带隙基准电压源的实现 张科
CNKI
ADS中噪声源使用验证
XU,YUE (K-China,ex1)
CN104601160B-灿芯半导[..]
Design Optimization of Power and Area of Two-Stage CMOS Operational ...
Telugu Maddileti;Govindarajulu Salendra;Chandra Mohan Reddy ...
Matching Analysis and the Design of Low Offset Amplifiers
Microsoft Word - 异步FIFO的设计.doc
Jerry
一种低噪声高电源抑制比CMOS低压[..]
分段温度曲率补偿双极工艺带隙基准设计
Session 26V
适合通信应用的低功耗55纳米12 省略 0 MSps双通道流水线型ADC 陈宏铭
A 10b 100MS/s 1.13mW SAR ADC with binary-scaled error compensation
Chun-Cheng Liu & Soon-Jyh Chang & Guan-Ying Huang & Ying-Zu Lin & Chung-Ming Huang & Chih-Hao Huang & Linkai Bu & Chih-Chung Tsai