VLSI Physical Design: From Graph Partitioning to Timing Closure
Andrew B. Kahng, Jens Lienig, Igor L. Markov, Jin Hu
ISM-PLL
未知
Microsoft Word - Chapter1 Importance of Impedance matching.doc
Peng Han
Convert to PDF
MySher
Synthesis of Arithmetic Circuits : FPGA, ASIC, and Embedded ...
Deschamps & Jean-Pierre. & Bioul & Gery Jean Antoine. & Sutter & Gustavo D.
MOSAmpNoise.dvi
CMOS低压差线性稳压器 [王忆,何乐年 著] 2012年
微波工程(第四版) (David M.Pozar) (Z-Library)
Optimum Feedback Amplifier Design For Control Systems
Timothy E. Biesecker
SPI Block Guide V4
Freescale Semiconductor, Inc.
Delta-sigma dac设计和分析
jianggx
Handbook of Power Management Circuits-Haruo Kobayashi
CMOS Circuit Design, Layout, and Simulation
Baker, R. Jacob
Low-Cost Low-Power 2.4 GHz RF Transceiver datasheet (Rev. C)
Texas Instruments, Incorporated [SWRS040,C
适宜于系统集成的高速高精度模数转换[..]
eetop.cn TN07CLDR001 1 3
Julia中文文档
Low Voltage, Low Power CMOS Bandgap References
zshu
7 Series FPGAs GTX/GTH Transceivers User Guide (UG476)
Xilinx, Inc.