理工书库 lilin | Category: product.version.v2023.2

Discover (Random Books)

js.2010.PFD biased with shunt regulator

js.2010.PFD biased with shunt regulator

e采样与adc

e采样与adc

Numerical Methods for Wave Equations in Geophysical Fluid Dynamics (Dale R. Durran (auth.)) (Z-Library)

Numerical Methods for Wave Equations in Geophysical Fluid Dynamics ...

Scaling LC Oscillators in Nanometer CMOS Technologies to a Smaller Area But With Constant Performance

Scaling LC Oscillators in Nanometer CMOS Technologies to a Smaller ...

Shih-An Yu & Peter R. Kinget

基于功耗优化的Pipelined+ADC系统结构设计与关键单元研究 (1)

基于功耗优化的Pipelined+[..] (1)

多频段匹配自动优化

多频段匹配自动优化

(Analog Circuits and Signal Processing) Danica Stefanovic, Maher Kayal

(Analog Circuits and Signal Processing) Danica Stefanovic, Maher ...

Sahrling M. Analog Circuit Simulators for Integrated Circuit Designers 2021

Sahrling M. Analog Circuit Simulators for Integrated Circuit ...

Verilog HDL Design Examples

Verilog HDL Design Examples

Joseph Cavanagh

概率论与数理统计 (同济大学数学系) (Z-Library)

概率论与数理统计 (同济大学数学系) (Z-Library)

通信原理公式手册

通信原理公式手册

ISSCC2021-T4-Measuring and Evaluating the Security Level of Circuits

ISSCC2021-T4-Meas[..] and Evaluating the Security Level of ...

Verification of SD/MMC Controller IP Using UVM

Verification of SD/MMC Controller IP Using UVM

The Delta-Sigma Modulator [A Circuit for All Seasons]

The Delta-Sigma Modulator [A Circuit for All Seasons]

VerilogA系统设计与仿真（可搜索）（吴顺珉）

VerilogA系统设计与仿真（可[..]

Analog-to-Digital Conversion

Analog-to-Digital Conversion

Session 21

Session 21

Session 35

Session 35

Category: product.version.v2023.2

Standard Verification Rule Format (SVRF) Manual 2023

Standard Verification Rule Format (SVRF) Manual 2023

Siemens Industry Software