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模拟IC设计

模拟IC设计

CMOS IC LAYOUT

CMOS IC LAYOUT

Session 9: ML Processors From Cloud to Edge

Session 9: ML Processors From Cloud to Edge

Phase Locked Loops for Wireless Communications

Phase Locked Loops for Wireless Communications

All-Digital Frequency Synthesizer for RF Wireless Application

All-Digital Frequency Synthesizer for RF Wireless Application

thesis.dvi

thesis.dvi

RF Microelectronics 2nd

RF Microelectronics 2nd

DCDC变换器工作原理及设计

DCDC变换器工作原理及设计

架构艺术

架构艺术

恒流LDO型自光LED驱动芯片的设计研究

恒流LDO型自光LED驱动芯片的设计研究

逐达逼近型模数转换器的低功耗与高速设计技术研究

逐达逼近型模数转换器的低功耗与高速[..]

Session 35

Session 35

有限元方法（第五版）第一卷基本原理

有限元方法（第五版）第一卷基本原理

（英）O.C.Zienkiewicz （美）R.L.Taylor著

CMOS DLL-based 2-V 3.2-ps jitter 1-GHz clock synthesizer and temperature-compensated tunable oscillator

CMOS DLL-based 2-V 3.2-ps jitter 1-GHz clock synthesizer and ...

D.J. Foley;M.P. Flynn

华侨大学模拟IC实验8 无缓冲两级运放设计

华侨大学模拟IC实验8 无缓冲两级运放设计

Spectre Classic Simula tor, Spectre APS, Spectre X, Spectre XPS, Spectre FMC Anal ysis, and Legato Reliability Solu tion User Guide

Spectre Classic Simula tor, Spectre APS, Spectre X, Spectre ...

Inc. Cadence Design Sys tems

PrimeTime User Guide

PrimeTime User Guide

Computational electromagnetism variational formulations, complementarity, edge elements by Alain Bossavit, Isaak D. Mayergoyz (z-lib.org)

Computational electromagnetism variational formulations, complementarity, ...

Category: product.id.P11713

Calibre® Query Server Manual

Calibre® Query Server Manual

Siemens Industry Software