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VLSI Physical Design: From Graph Partitioning to Timing Closure

VLSI Physical Design: From Graph Partitioning to Timing Closure

Andrew B. Kahng, Jens Lienig, Igor L. Markov, Jin Hu

低电压CMOS分数分频锁相环频率综合器关键技术研究

低电压CMOS分数分频锁相环频率综合器关键技术研究

Differential Equations Theory, Technique, and Practice by George Simmons, Steven Krantz (z-lib.org)

Differential Equations Theory, Technique, and Practice by George ...

一种无片外电容LDO的瞬态增强电路设计

一种无片外电容LDO的瞬态增强电路设计

EE214B Advanced Analog Integrated Circuit Design Winter2016 Boaris Murmann

EE214B Advanced Analog Integrated Circuit Design Winter2016 ...

Generate ESD Source in ADS

Generate ESD Source in ADS

TU,NASH (K-Taiwan,ex1)

CH01

CH01

A fast-settling CMOS op amp for SC circuits with 90-dB DC gain

A fast-settling CMOS op amp for SC circuits with 90-dB DC gain

K. Bult;G.J.G.M. Geelen

高效率boost DCDC电源管理芯片设计技术研究

高效率boost DCDC电源管理芯片设计技术研究

Advanced data converters G Manganaro

Advanced data converters G Manganaro

信号与系统 2nd 西蒙赫金

信号与系统 2nd 西蒙赫金

Introduction to Linear Algebra by Gilbert Strang (z-lib.org)

Introduction to Linear Algebra by Gilbert Strang (z-lib.org)

Microsoft Word - RDK FractN PLL Tutorial v1.0 090420

Microsoft Word - RDK FractN PLL Tutorial v1.0 090420

Next-Generation ADCs, High-Performance Power Management, and Technology Considerations for Advanced Integrated Circuits Advances in Analog Circu

Next-Generation ADCs, High-Performance Power Management, and ...

LDO设计论文

LDO设计论文

SystemVerilog 验证方法学 - Verification Methodology Manual for SystemVerilog

SystemVerilog 验证方法学 - Verification Methodology Manual for SystemVerilog

Janick Bergeron & Eduard Cemy & Alan Hunter & Andrew Nightingale 著 & 夏宇闻译

APR8 - Principles of Sigma-Delta Modulation for Analog-to-Digital Converters

APR8 - Principles of Sigma-Delta Modulation for Analog-to-Digital ...

模拟电路版图的艺术

模拟电路版图的艺术

Category: 40 Gigabit Ethernet

IEEE Standard for Ethernet

IEEE Standard for Ethernet