高速低功耗逐次逼近型模数转换器的研[..]
未知
CMOS DLL-based 2-V 3.2-ps jitter 1-GHz clock synthesizer and ...
D.J. Foley;M.P. Flynn
Memory systems_ cache, DRAM, disk -- Bruce Jacob, Spencer Ng, ...
普林斯顿微积分读本(修订版)
Adrian Banner
A 2.7-V 900-MHz CMOS LNA and Mixer - Solid-State Circuits, IEEE ...
IEEE
Harmonic balance finite element method applications in nonlinear ...
Handbook of Algorithms for Physical Design Automation
Charles J. Alpert, Dinesh P. Mehta, Sachin S. Sapatnekar
Charge Pump Circuit Design [Pan, Feng and Samaddar, Tapan] Good ...
Session 23
拉扎维《CMOS集成电路设计》答案手写版
S_Para_E.PM6
Dz@PMAN-PC2
CMOS集成电路中静电防护电路的设[..]
The Definitive ANTLR 4 Reference
Terence Parr
Hajimiri Analog DRAFT012021
Session 35: Adaptive Digital Techniques for Variation Tolerant ...
RF Circuit Design
Bowick, Christopher;Blyler, John;Ajluni, Cheryl
THE DESIGN OF MASTER-SLAVE DLL FOR DDR2 SDRAM CONTROLLER IN ...
iccad095
模拟IC设计
拉扎维
IEEE Standard for Ethernet