一种低静态电流、高稳定性的LDO线[..]
未知
Session 17: DC-DC Converters
Modern Semiconductor Devices for Integrated Circuits
Chenming Calvin Hu
High Performance SAR-based ADC Design in Deep Sub-micron CMOS
lei sun
锁相环(PLL)电路设计与应用
(日)远坂俊昭 著 何希才译
深亚微米CMOS工艺ESD器件结构[..]
微软用户
Algorithms for VLSI Physical Design Automation, 3E
Naveed Sherwani
Assura Physical Verifica tion User Guide
Inc. Cadence Design Sys tems
Calibre® DESIGNrev Reference Manual
Siemens Industry Software
微处理器设计：从设计规划到工艺制造
PCI Express Base r3.1
Bill Haffner
AXI Memory Mapped to PCI Express (PCIe) Gen2 v2.8 LogiCORE IP ...
Xilinx, Inc.
[Behzad Razavi] Phase-Locking in High-Performance (BookFi)
Noise and Spurious Tones Management Techniques for Multi-GHz ...
Adrian Maxim
Session 30
CMOS带隙基准源研究现状 幸新鹏
CMOS-Voltage-Refe[..]
4<8=8AB@0B>@
CMOS模拟集成电路版图设计与验证 基于Cadence Virtuoso与Mentor Calibre
尹飞飞
CMOS Fractional-N Synthesizers: Design for High Spectral Purity ...
Bram De Muer & Michiel Steyaert