Session 25: DRAM
未知
ISSCC2021-SC1-Int[..] to PLLs Phase Noise, Modeling, and Key ...
一种基于斩波调制的低压高精度CMO[..] 刘帘曦
阻抗匹配与史密斯（Smith）圆图[..]
ISSCC2021-SC4
Analysis and Design of CMOS Clocking Circuits for Low Phase ...
Woorham Bae & Deog-Kyoon Jeong
Calibre® xACT User's Manual
Siemens Industry Software
Fundamentals of High Frequency CMOS Analog Integrated Circuits, ...
CMOS 集成电路设计手册 第3版·模拟电路篇=CMOS CIRCUIT DESIGN LAYOUT AND SIMULATION ...
A bandgap reference using chopping for reduction of
Harmonic Balance for Nonlinear Vibration Problems
0002624
Bandgap & LDO-李福乐
Administrator
DCDC变换器工作原理及设计
MPS
Session 8: Ultra-High-Speed Wireline
7 Series FPGAs GTX/GTH Transceivers User Guide (UG476)
Xilinx, Inc.
开关电容电路 从入门到精通
JSSC 202212
Modeling Jitter in PLL-based Frequency Synthesizers
Ken Kundert
IEEE Standard for Ethernet