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SARADC设计

SARADC设计

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一种低压CMOSLDO稳压电源电路

一种低压CMOSLDO稳压电源电路

A 10-bit 50-MS/s SAR ADC With a Monotonic Capacitor Switching Procedure

A 10-bit 50-MS/s SAR ADC With a Monotonic Capacitor Switching ...

Chun-Cheng Liu;Soon-Jyh Chang;Guan-Ying Huang;Ying-Zu Lin

2014 PhD-Thesis BAG A Designer-Oriented Framework for the Development of AMS Circuit Generators

2014 PhD-Thesis BAG A Designer-Oriented Framework for the Development ...

Session 5

Session 5

Xilinx DS249 LogiCORE IP CORDIC v4.0, Data Sheet,

Xilinx DS249 LogiCORE IP CORDIC v4.0, Data Sheet,

DesignWare Synthesizable Components for AMBA 3 AXI, and AMBA 4 AXI User Guide, Version 2020.03a

DesignWare Synthesizable Components for AMBA 3 AXI, and AMBA ...

Session 21

Session 21

examples

examples

数据转换器

数据转换器

Nano-scale CMOS Analog Circuits: Models and CAD Techniques for High-Level Design

Nano-scale CMOS Analog Circuits: Models and CAD Techniques for ...

Analog Circuit Design Volume 2 Immersion in the Black Art of Analog Design.

Analog Circuit Design Volume 2 Immersion in the Black Art of ...

Bob Dobkin,John Hamburger

A 2.7-V 900-MHz CMOS LNA and Mixer - Solid-State Circuits, IEEE Journal of

A 2.7-V 900-MHz CMOS LNA and Mixer - Solid-State Circuits, IEEE ...

硅基压控振荡器的研究与设计电子科技大学彭羽

硅基压控振荡器的研究与设计电子科技大学彭羽

数字集成电路电路、系统与设计(第2版)2010-11 拉贝艾(Jan M.Rabaey)、 Anantha Chandrakasan

数字集成电路电路、系统与设计(第2[..] 拉贝艾(Jan M.Rabaey)、 Anantha Chandrakasan

RISC-V IOMMU Architecture Specification

RISC-V IOMMU Architecture Specification

IOMMU Task Group

Session 8: Ultra-High-Speed Wireline

Session 8: Ultra-High-Speed Wireline

Category: 北京航空航天大学出版社

SystemVerilog 验证方法学 - Verification Methodology Manual for SystemVerilog

SystemVerilog 验证方法学 - Verification Methodology Manual for SystemVerilog

Janick Bergeron & Eduard Cemy & Alan Hunter & Andrew Nightingale 著 & 夏宇闻译