Session 33
未知
ISSCC2021-T5-Cali[..] Techniques in ADCs
Tempus User Guide
Inc. Cadence Design Sys tems
A 76 dB 1.7 GHz 0.18 m CMOS Tunable TIA Using Broadband Current ...
Hossein Miri Lavasani & Wanling Pan & Brandon Harrington & Reza Abdolvand & Farrokh Ayazi
ADC-based Receivers for Wireline Communication
深亚微米FPGA结构与CAD设计 12083165 2
ISSCC2021-SC4
LDO降压转换器的稳定性分析
High Efficiency RF and Microwave Solid State Power Amplifiers
Paolo Colantonio, Franco Giannini & Ernesto Limiti
JESD204 v7.2 LogiCORE IP Product Guide (PG066)
Xilinx, Inc.
半导体器件物理(原书第三版)中文版[..]
Handbook of Power Management Circuits
Bandgap & LDO-李福乐
Administrator
高精度带隙基准电压源的实现 江金光
CMOS 集成电路设计手册 第3版·模拟电路篇=CMOS CIRCUIT DESIGN LAYOUT AND SIMULATION ...
信号与系统习题详解 奥本
ISSCC2021-SC2-PLL Architectures, Tradeoffs, and Key Application ...
Linear Circuit Transfer Functions: An Introduction to Fast Analytical ...
Christophe P. Basso
Xilinx DS534, FIR Compiler v5.0, Data Sheet
Vivado Design Suite User Guide: Logic Simulation (UG900)