Session 13
未知
Dracula Reference
Inc. Cadence Design Sys tems
2005 Book ClockGeneratorsFo[..]
Traveling Wave Analysis of Partial Differential Equations Numerical ...
CN104391533A-High[..] (power supply rejection ratio) LDO (low ...
Fundamentals of Layout Design for Electronic Circuits
Jens Lienig Juergen Scheible
High-Frequency Integrated Circuits
Voinigescu, Sorin
Harmonic Balance for Nonlinear Vibration Problems
Malte Krack
PowerManagmentIC
khchen
eetop.cn CMOS VLSI Design A Circuits and Systems Perspective ...
The Method of Moments in Electromagnetics
Walton C. Gibson
A 10b 100MS/s 1.13mW SAR ADC with binary-scaled error compensation
Chun-Cheng Liu & Soon-Jyh Chang & Guan-Ying Huang & Ying-Zu Lin & Chung-Ming Huang & Chih-Hao Huang & Linkai Bu & Chih-Chung Tsai
高性能流水线模数转换器及其数字校准[..] 贾华宇
Silicon-Germanium Heterojunction Bipolar Transistors (2002)
Microsoft PowerPoint - PLL_UT_tutorial_A[..]
enjoy
A 2.488–11.2 Gb/s multi-protocol SerDes in 40nm low-leakage ...
Socrates D. Vamvakos & Claude R. Gauthier & Chethan Rao & Karthisha Ramoshan Canagasaby & Prashant Choudhary & Sanjay Dabral & Shaishav Desai & Mahmudul Hassan & K.C. Hsieh & Bendik Kleveland & Gurupada Mandal & Richard Rouse & Ritesh Saraf & Alvin Wang & Jason Yeung & Khaldoon Abugharbieh & Ying Cao
普林斯顿微积分读本（修订版）
Adrian Banner
Session 9: ML Processors From Cloud to Edge
IEEE Standard for Ethernet