SARADC设计
李福乐
Session 5
未知
CN105530002B-中电华大[..]
Circuit Simulation by Farid N. Najm (z-lib.org)
低电压CMOS分数分频锁相环频率综合器 关键技术研究
LU HUNG
CMOS Analog Circuit Design (1)
ESD Analog Circuits and Design
Cadence Physical Verifi cation User Guide
Inc. Cadence Design Sys tems
Synthesis of Arithmetic Circuits : FPGA, ASIC, and Embedded ...
Deschamps & Jean-Pierre. & Bioul & Gery Jean Antoine. & Sutter & Gustavo D.
Custom WaveView� User Guide
Inc. Synopsys
一种自适应补偿的宽输入LDO设计
The advanced part of A treatise on the dynamics of a system ...
Routh, Edward John, 1831-1907.
微波射频电路设计与仿真100例
Administrator
高速高精度ADC中基准电压源的研究与设计 (1)
A 2.488–11.2 Gb/s multi-protocol SerDes in 40nm low-leakage ...
Socrates D. Vamvakos & Claude R. Gauthier & Chethan Rao & Karthisha Ramoshan Canagasaby & Prashant Choudhary & Sanjay Dabral & Shaishav Desai & Mahmudul Hassan & K.C. Hsieh & Bendik Kleveland & Gurupada Mandal & Richard Rouse & Ritesh Saraf & Alvin Wang & Jason Yeung & Khaldoon Abugharbieh & Ying Cao
Michiel Steyaert CMOS CELLULAR RECEIVER FRONT-ENDS
<4D6963726F736F66[..]
linjie
bingdian001.com
IEEE Standard for Ethernet