CMOS集成电路EDA技术
作者
LDO的三种频率补偿方案实现
未知
Modified modeling of Miller compensation for two-stage operational ...
H.C. Yang;D.J. Allstot
Full page photo print
aboozar
Scaling <formula formulatype="inli[..] Notation="TeX">$L[..] ...
Shih-An Yu & Peter R. Kinget
Advanced Analog Building Blocks
Shen
Design techniques for cascoded CMOS op amps with improved PSRR ...
D.B. Ribner & M.A. Copeland
Microsoft Word - CummingsSNUG2008B[..]
cliffc
Session 16
模拟电路与数字电路
林捷
A precise on-chip voltage generator for a gigascale dram with ...
IEEE
ADS射频电路设计与仿真入门及应用实例
冯新宇著
RISC-V手册
Da
GmID Methodology
Administrator
Dynamic Analysis of Switching-Mode DC DC Converters-Springer ...
Session 27
Stability for Op Amps
DESIGN WITH OPERATIONAL AMPLIFIERS AND
Xilinx DS534, FIR Compiler v5.0, Data Sheet
Xilinx, Inc.
Xilinx DS558, LogiCORE IP DDS Compiler v4.0, Data Sheet
Xilinx PG153 LogiCORE IP AXI Quad Serial Peripheral Interface ...
AXI Interconnect v2.1 LogiCORE IP Product Guide (PG059)
AXI Memory Mapped to PCI Express (PCIe) Gen2 v2.8 LogiCORE IP ...