[Behzad Razavi] Phase-Locking in High-Performance (BookFi)
未知
Session 9
集成电路静态时序分析与建模
刘峰编著
Design of class AB output stages using the structural methodology
V. Ivanov & I. Filanovsky
模拟电路版图的艺术
ALAN HASTINGS著
艾伦教材答案
Microsoft Word - LNA.doc
Smoothing the Way for Digital Phase-Locked Loops: Clock Generation ...
Cheng-Ru Ho & Mike Shuo-Wei Chen
ISSCC2021-SC2
CMOS集成电路中静电防护电路的设[..]
A mixed-mode esd protection circuit simulation-design methodology ...
Kendall Su, Analog Filters, 2nd Ed.
Single miller capacitor frequency compensation technique for ...
Dynamic Response of Linear Systems Impact of Pole & Zero Locations
Digital Control of Dyanmic Systems 3rd ed - G. Franklin, J. ...
John
ISSCC2021-SC1
Gabriel Alfonso Rincon-Mora
Voltage References From Diodes to Precision High-Order Bandgap ...
Microsoft Word - Chapter1 Importance of Impedance matching.doc
Peng Han
Xilinx DS534, FIR Compiler v5.0, Data Sheet
Xilinx, Inc.
Xilinx DS558, LogiCORE IP DDS Compiler v4.0, Data Sheet