CMOS模拟集成电路
王永生
Understanding Jitter Requirements of PLL-Based Processors Application ...
ANALOG DEVICES INC.
计算电磁学 by 王秉中,邵维 (z-lib.org)
CNKI
实用开关电源设计
未知
Spectre FX Circuit Simu lator User Guide
Inc. Cadence Design Sys tems
RF Microelectronics 2nd
Session 10: Continuous-Time ADCs and DACs
Verilog HDL Design Examples
Joseph Cavanagh
Optimum Feedback Amplifier Design For Control Systems
Timothy E. Biesecker
A Single-Trim CMOS Bandgap Reference With aInaccuracy of0.15% ...
Guang Ge & Cheng Zhang & Gian Hoogzaad & Kofi A. A. Makinwa
Triple-Speed Ethernet Intel® FPGA IP User Guide
Intel Corporation
Dynamic Response of Linear Systems Impact of Pole & Zero Locations
CN104601160B-灿芯半导[..]
一种具有过温与过流保护功能的LDO
jssc.2005.Replica Compensated Linear Regulators for PLLs
Silicon-Germanium Heterojunction Bipolar Transistors (2002)
Virtuoso Parameterized Cell Reference
Design Procedure for Two-Stage CMOS Transconductance Operational ...
Intel® Arria® 10 and Intel® Cyclone® 10 GX Avalon®-MM Interface ...