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ISSCC2021-SC2

ISSCC2021-SC2

ESD in Silicon Integrated Circuits

ESD in Silicon Integrated Circuits

一种具有温度补偿高电源抑制比的带隙基准源何捷

一种具有温度补偿高电源抑制比的带隙基准源何捷

简并点优化的高性能带隙基准电路

简并点优化的高性能带隙基准电路

1.5Bit 级pipelined+ADC典型单级电路结构实现研究

1.5Bit 级pipelined+ADC典型单[..]

Allen CMOS模拟集成电路设计解答

Allen CMOS模拟集成电路设计解答

Finite element analysis with error estimators an introduction to the FEM and adaptive error analysis for engineering students (J. E. Akin) (Z-Library)

Finite element analysis with error estimators an introduction ...

CMOS带隙基准源研究与设计

CMOS带隙基准源研究与设计

TI-CICC2006-A Sub-i V Low-Noise Bandgap Voltage Reference

TI-CICC2006-A Sub-i V Low-Noise Bandgap Voltage Reference

Single miller capacitor frequency compensation technique for low power multistage amplifiers

Single miller capacitor frequency compensation technique for ...

数值计算方法 (2)

数值计算方法 (2)

DCDC变换器工作原理及设计

DCDC变换器工作原理及设计

计算电磁学 by 王秉中,邵维 (z-lib.org)

计算电磁学 by 王秉中,邵维 (z-lib.org)

A precise on-chip voltage generator for a gigascale dram with a negative word-line scheme - Solid-State Circuits, IEEE Journal of

A precise on-chip voltage generator for a gigascale dram with ...

Calibre xACT Quick Reference

Calibre xACT Quick Reference

Siemens Industry Software

GPS接收机内带镜像抑制的中频滤波器设计

GPS接收机内带镜像抑制的中频滤波器设计

Internal and external op-amp compensation: a control-centric tutorial - American Control Conference, 2004. Proceedings of the 2004

Internal and external op-amp compensation: a control-centric ...

BesserWM35.vp:CorelVentura 7.0

BesserWM35.vp:Cor[..] 7.0

Category: Virtex 7

Xilinx PG153 LogiCORE IP AXI Quad Serial Peripheral Interface (SPI) v3.1, Product Guide

Xilinx PG153 LogiCORE IP AXI Quad Serial Peripheral Interface ...

AXI Interconnect v2.1 LogiCORE IP Product Guide (PG059)

AXI Interconnect v2.1 LogiCORE IP Product Guide (PG059)