ISSCC2021-T1-Fund[..] of RF and Mm-Wave Power Amplifier Designs
未知
LDO设计小结一
zeng zhen
ISSCC2021-SC4-Pro[..] Clock Generation, Distribution, and Clock ...
锁相环相位噪声与环路带宽的关系分析
TEMPERATURE AND PROCESS (56) COMPENSATED CURRENT REFERENCE CIRCUITS
信号与系统（奥本海姆）
高速串行接口时钟数据恢复电路设计研究
Distributed Loss-Compensation Techniques for Energy-Efficient ...
ISSC2021 SESSION 2
基于XILINX FPGA的OFDM通信系统基带设计
Operational Amplifiers Theory and Design (Johan Huijsing (auth.)) ...
2019 Millimeter-Wave Circuits for 5G and Radar
射频电路与芯片设计要点（中文版）
低功率、高分辨率的A-D转换器@2018
作者
离散时间控制系统（第二版） Katsuhiko ； Ogata (z-lib.org)
PCI Express Base r3.0
ch3_pnjunction
Claudio Talarico
适用于高速闪存的超快无片外电容LDO
Xilinx PG153 LogiCORE IP AXI Quad Serial Peripheral Interface ...
Xilinx, Inc.
JESD204 v7.2 LogiCORE IP Product Guide (PG066)
AXI Interconnect v2.1 LogiCORE IP Product Guide (PG059)
AXI Memory Mapped to PCI Express (PCIe) Gen2 v2.8 LogiCORE IP ...
Vivado Design Suite User Guide: Logic Simulation (UG900)
PCI Express PHY v1.0 LogiCORE IP Product Guide