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Discover (Random Books)

运放仿真方法整理

运放仿真方法整理

USER

SystemVerilog 验证方法学 - Verification Methodology Manual for SystemVerilog

SystemVerilog 验证方法学 - Verification Methodology Manual for SystemVerilog

Janick Bergeron & Eduard Cemy & Alan Hunter & Andrew Nightingale 著 & 夏宇闻 译

Session 23

Session 23

未知

Session 3

Session 3

未知

综合与Design Compiler

综合与Design Compiler

阳晔

CMOS射频集成电路设计(第二版) —— The Design of CMOS Radio-Frequency Integrated Circuits, Second Edition

CMOS射频集成电路设计(第二版) —— The Design of CMOS Radio-Frequency Integrated ...

美 & Thomas H. Lee 著 & 余志平 周润德 等译

Fundamentals of Layout Design for Electronic Circuits

Fundamentals of Layout Design for Electronic Circuits

Jens Lienig Juergen Scheible

USB2.0协议中文版

USB2.0协议中文版

Jungle

架构艺术

架构艺术

未知

Xilinx DS558, LogiCORE IP DDS Compiler v4.0, Data Sheet

Xilinx DS558, LogiCORE IP DDS Compiler v4.0, Data Sheet

Xilinx, Inc.

509764_1_En_Print.indd

509764_1_En_Print[..]

0014813

高性能流水线模数转换器及其数字校准技术研究 贾华宇

高性能流水线模数转换器及其数字校准[..] 贾华宇

未知

Dynamic offset compensated CMOS amplifiers-Huijsing

Dynamic offset compensated CMOS amplifiers-Huijsing

未知

模拟集成电路分析与设计 洪志良

模拟集成电路分析与设计 洪志良

未知

Signal and Power Integrity - Simplified, Third edition

Signal and Power Integrity - Simplified, Third edition

Eric Bogatin

eetop.cn CMOS VLSI Design A Circuits and Systems Perspective 4th Edition

eetop.cn CMOS VLSI Design A Circuits and Systems Perspective ...

未知

Power supply rejection ratio in operational transconductance amplifiers - Circuits and Systems, IEEE Transactions on

Power supply rejection ratio in operational transconductance ...

IEEE

A comparative study of various current mirror configurations_ Topologies and characteristics

A comparative study of various current mirror configurations_ ...

Bhawna Aggarwal & Maneesha Gupta & A.K. Gupta

Category: Cache and Memory Interface

Nios II Processor Reference Guide

Nios II Processor Reference Guide

Intel Corporation

Book Details

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