模拟集成电路设计 以LDO为例
Gabriel
A 0.775mW 10-bit 40-MS/s SAR ADC in 0.18μm CMOS process
Wenzha Yang & Yi Zhang & Enwen Dai & ZhiLin Feng & Wei Li
高速低功耗逐次逼近式ADC研究与实现
未知
PLL Perfomance, Simulation, and Design
Dean Banerjee
射频电路设计-理论与应用 中文第1版
A Flexible, Low-Power Analog PLL for SoC and Processors in 14nm ...
Kuan-Yueh Shen & Syed Feruz Syed Farooq & Yongping Fan & Khoa Minh Nguyen & Qi Wang & Mark L. Neidengard & Nasser Kurd & Amr Elshazly
Spectre Circuit Simulator RF Analysis Theory
Inc. Cadence Design Sys tems
Session 17: DC-DC Converters
Virtuoso Visualization and Analysis XL User Guide
The advanced part of A treatise on the dynamics of a system ...
Routh, Edward John, 1831-1907.
3P-EBK: CALCULUS EARLY TRANSCENDENTALS
Analog Design Essentials
sansen
14984226455248291[..]
数值分析.Timothy Sauer.图灵中文扫描版
电路原理 （第7版）
CMOS IC LAYOUT
Wei Zhi
12bit pipeline ADC design
Session 33: High-Voltage, GaN and Wireless Power
Accurate and Rapid Measurement of IP2 and IP3
Ken Kundert