带隙基准电路的研究
<CCC6B3A4CEC4>
Spectre FX Circuit Simu lator User Guide
Inc. Cadence Design Sys tems
PLL WITH LOW SPURS
未知
一种用于低功耗LDO的CMOS电压[..]
Modelithics Optimized LNA Design April MWJ 2021
Microsoft Word - Telescopic.doc
chwtang
高效率boost DCDC电源管理芯片设计技术研究
wumin
用于OFDM+UWB系统中的中频滤[..]
一种基于LDO稳压器的带隙基准电压源设计
CN104977963A-兆易创新[..]
bingdian001.com
25Gbps系统封装和高速互连的信[..]
Analysis and Design of Monolithic, High PSR, Linear Regulators ...
Vishal
模拟CMOS电路设计折中与优化
A 0.775mW 10-bit 40-MS/s SAR ADC in 0.18μm CMOS process
Wenzha Yang & Yi Zhang & Enwen Dai & ZhiLin Feng & Wei Li
ELKHOLY-DISSERTAT[..]
Next-Generation ADCs, High-Performance Power Management, and ...
Accurate and Rapid Measurement of IP2 and IP3
Ken Kundert