A 3.3-V 12-b 50-MS/s A/D converter in 0.6-/spl mu/m CMOS with ...
IEEE
LDO模拟集成电路设计
未知
Single miller capacitor frequency compensation technique for ...
Session 33
Robust Design of LV/LP Low-Distortion CMOS Rail-to-Rail Input ...
低中频接收机中复数滤波器的设计
Circuit Simulation by Farid N. Najm (z-lib.org)
Nested Miller compensation in low-power CMOS design
Ka Nang Leung;P.K.T. Mok
应用随机过程概率论模型导论 (Sheldon M.Ross) (Z-Library)
LDO与VLDO的设计原理及性能测试
THE DESIGN OF MASTER-SLAVE DLL FOR DDR2 SDRAM CONTROLLER IN ...
iccad095
通信系统第五版西蒙赫金
ADS2008射频电路设计与仿真实例
徐兴福 著
全差分运算放大器设计
chwtang
eetop.cn (Paper)The Flipped Voltage Follower A Useful Cell for
模拟CMOS集成电路设计（拉扎维）答案
陈鹏远
USB 3.0中五分频电路设计
TOM
Dynamic Response of Linear Systems Impact of Pole & Zero Locations
Numerical Simulation of Optical Wave Propagation With Examples ...
Jason D. Schmidt