理工书库 lilin | Category: phase-locked loop (PLL)

Discover (Random Books)

一种低温漂CMOS带隙基准电压源的设计陈碧

一种低温漂CMOS带隙基准电压源的设计陈碧

Harmonic balance finite element method applications in nonlinear electromagnetics and power systems (Lu, Junwei Yamada, Sotoshi Zhao, Xiaojun) (z-lib.org)

Harmonic balance finite element method applications in nonlinear ...

逐达逼近型模数转换器的低功耗与高速设计技术研究

逐达逼近型模数转换器的低功耗与高速[..]

CIRCUIT SIMULATION METHODS and ALGORITHMS

CIRCUIT SIMULATION METHODS and ALGORITHMS

Sweetspot

Sweetspot

Distributed MOS varactor biasing for VCO gain equalization in 0.13 /spl mu/m CMOS technology

Distributed MOS varactor biasing for VCO gain equalization in ...

J. Mira & T. Divel & S. Ramet & J.-B. Begueret & Y. Deval

FFT IP核调用与仿真

FFT IP核调用与仿真

琥珀主1369195734

ISSC2021 SESSION 2

ISSC2021 SESSION 2

Digital integrated circuit design using verilog and systemverilog (Ronald Mehler) (z-lib.org)

Digital integrated circuit design using verilog and systemverilog ...

A 76 dB 1.7 GHz 0.18 m CMOS Tunable TIA Using Broadband Current Pre-Amplifier for High Frequency Lateral MEMS Oscillators

A 76 dB 1.7 GHz 0.18 m CMOS Tunable TIA Using Broadband Current ...

Hossein Miri Lavasani & Wanling Pan & Brandon Harrington & Reza Abdolvand & Farrokh Ayazi

适宜于系统集成的高速高精度模数转换电路设计技术研究-李福乐

适宜于系统集成的高速高精度模数转换[..]

PLL 设计仿真及应用

PLL 设计仿真及应用

AN 812: Platform Designer System Design Tutorial

AN 812: Platform Designer System Design Tutorial

Intel Corporation

Vivado Design Suite User Guide: Logic Simulation (UG900)

Vivado Design Suite User Guide: Logic Simulation (UG900)

HSPICE/SPICE Interface Reference

HSPICE/SPICE Interface Reference

Inc. Cadence Design Sys tems

Microelectronic circuits 6th edition

Microelectronic circuits 6th edition

AXI Memory Mapped to PCI Express (PCIe) Gen2 v2.8 LogiCORE IP Product Guide (PG055)

AXI Memory Mapped to PCI Express (PCIe) Gen2 v2.8 LogiCORE IP ...

数值分析基础（第三版） (关治、陆金甫) (z-lib.org)

数值分析基础（第三版） (关治、陆金甫) (z-lib.org)

Category: phase-locked loop (PLL)

A Low-Jitter and Low-Reference-Spur Ring-VCO-Based Switched-Loop Filter PLL Using a Fast Phase-Error Correction Technique

A Low-Jitter and Low-Reference-Spur Ring-VCO-Based Switched-Loop ...

Yongsun Lee & Taeho Seong & Seyeon Yoo & Jaehyouk Choi