Digital Logic and Computer Design
M. MORRIS MANO
A TIA in CMOS 0.18um
未知
CMOS模拟集成电路设计与仿真实例[..] ADE
SKILL Development of Parameterized Cells 5141
Session 2: Highlighted Chip Releases: 5G and Radar Systems
集成电路掩模设计－基础版图技术
NoiseDesign.dvi
Universal Verification Methodology (UVM) Cookbook
Functional Verification Methodology Team - Mentor & A Siemens Business
CMOS模拟集成电路设计
（美）艾伦，（美）霍尔伯格著
A detailed analysis of power-supply noise attenuation in bandgap ...
DCDC-EECS-2011-94
ISSCC2021-SC2
看一个TI老工程师如何驯服精密放大器
ISSCC2021 Session 21
CN106656160A-上海集成[..]
高PSRR无电容型线性稳压器的研究与设计
LU HUNG
Avalon® Interface Specifications
Intel Corporation
高效率 PWM 控制电流型 DC-DC
Lenovo User
A 76 dB 1.7 GHz 0.18 m CMOS Tunable TIA Using Broadband Current ...
Hossein Miri Lavasani & Wanling Pan & Brandon Harrington & Reza Abdolvand & Farrokh Ayazi