Katsuhiko Ogata
dynstab2/ThePirateBay
Preparation of Papers in Two-Column Format for the Proceedings ...
Laura Hyslop
温度补偿的30nA CMOS电流源及在LDO中的应用
未知
Computational Methods for Electromagnetic Phenomena
Cai, Wei
Fundamentals of Layout Design for Electronic Circuits
Jens Lienig Juergen Scheible
CMOS IC LAYOUT
Wei Zhi
LDO与VLDO的设计原理及性能测试
深亚微米CMOS工艺ESD器件结构[..]
微软用户
A 2.488–11.2 Gb/s multi-protocol SerDes in 40nm low-leakage ...
Socrates D. Vamvakos & Claude R. Gauthier & Chethan Rao & Karthisha Ramoshan Canagasaby & Prashant Choudhary & Sanjay Dabral & Shaishav Desai & Mahmudul Hassan & K.C. Hsieh & Bendik Kleveland & Gurupada Mandal & Richard Rouse & Ritesh Saraf & Alvin Wang & Jason Yeung & Khaldoon Abugharbieh & Ying Cao
ISSCC2021 Session 21
thesis.dvi
A mixed-mode esd protection circuit simulation-design methodology ...
examples
server1
Microsoft Word - Chapter1 Importance of Impedance matching.doc
Peng Han
Spice-Oriented Nonlinear Circuit Analysis Using Harmonic Balance ...
NCSP'09
教材:李庆扬数值分析-第五版
概率论基础教程 原书第9版
(美)罗斯著
04_TechActive.fm
Administrator
A 10b 100MS/s 1.13mW SAR ADC with binary-scaled error compensation
Chun-Cheng Liu & Soon-Jyh Chang & Guan-Ying Huang & Ying-Zu Lin & Chung-Ming Huang & Chih-Hao Huang & Linkai Bu & Chih-Chung Tsai