SystemVerilog 验证方法学 - Verification Methodology Manual for SystemVerilog
Janick Bergeron & Eduard Cemy & Alan Hunter & Andrew Nightingale 著 & 夏宇闻 译
5.0Gbps高速串行USB3.0[..]
未知
Low-Jitter Process-Independent DLL and PLL Based on Self-Biased ...
IEEE
集成电路静态时序分析与建模
刘峰编著
Session 6
软件无线电原理与应用 [楼才义，徐建良，杨小牛 编著] 2014年版
PHASE ERROR CANCELLATION
How to Calculate Balun Performances using ADS Expressions
Che-Sheng Chen
Operational Transconductance Amplifiers “OTAs”
Bernhard Boser
数字图像处理
（美）冈萨雷斯，（美）伍兹著
ISSCC2021-SC4-Pro[..] Clock Generation, Distribution, and Clock ...
Microsoft PowerPoint - Loop Stability Analysis_V2
vishalsaxena
14984226455248291[..]
基于 DLL倍频技术的 1GHz本地振荡器设计 英文 李金城
Scaling <formula formulatype="inli[..] Notation="TeX">$L[..] ...
Shih-An Yu & Peter R. Kinget
ISSCC2021 Session 17
A fast-settling CMOS op amp for SC circuits with 90-dB DC gain
K. Bult;G.J.G.M. Geelen
CMOS集成电路中静电防护电路的设[..]
Analysis and Design of ESD Protection for Robust Low-Power Pierce ...
Kim B. Ostman & Erlend Strandvik & Phil Corbishley & Tor Oyvind Vedal & Mika Salmi