esd-circuits-and-[..]
未知
ISSCC2017-24 Visuals(2)
Session 26V
Introduction to advance node feathers
88691
LDO与VLDO的设计原理及性能测试
Understanding Jitter and Phase Noise : A Circuits and Systems ...
Nicola Da Dalt; Ali Sheikholeslami & Ali Sheikholeslami
A 3.3-V 12-b 50-MS/s A/D converter in 0.6-/spl mu/m CMOS with ...
IEEE
A 240-nA Quiescent Current, 95.8% Efficiency AOT-Controlled ...
Wenbin Huang & Lianxi Liu & Xufeng Liao & Chengzhi Xu & Yonyuan Li
多频段匹配自动优化
Yue Xu
Session 1: Plenary Session — Invited Papers
2-Stage OTA Design
On-Chip Compensated Error Amplifier for
模拟集成电路信号完整性中抖动与振铃[..]
简并点优化的高性能带隙基准电路 应建华
模拟集成电路设计与仿真 何乐年
Edward
Control Systems Engineering
Norman S. Nise
Static timing analysis for nanometer designs a practical approach ...
电源芯片中CMOS带隙基准源与微调[..] (1)
7 Series FPGAs GTX/GTH Transceivers User Guide (UG476)
Xilinx, Inc.