ISSCC2021-T9-Desi[..] Amplifiers for Stability
未知
esd-circuits-and-[..]
AXI Memory Mapped to PCI Express (PCIe) Gen2 v2.8 LogiCORE IP ...
Xilinx, Inc.
Designing Audio Power Amplifiers (Bob Cordell) (Z-Library)
HSPICE/SPICE Interface Reference
Inc. Cadence Design Sys tems
A 10-bit 50-MS/s SAR ADC With a Monotonic Capacitor Switching ...
Chun-Cheng Liu;Soon-Jyh Chang;Guan-Ying Huang;Ying-Zu Lin
CMOS Schmitt trigger design - Circuits and Systems I: Fundamental ...
IEEE
Design of Bandgap Reference and Current Reference Generator ...
基准电压源和线性稳压器的设计-ta[..]
lmliu
ISSCC2021-SC4
Xilinx PG153 LogiCORE IP AXI Quad Serial Peripheral Interface ...
TI-CICC2006-A Sub-i V Low-Noise Bandgap Voltage Reference
hfss3dlayout
Kezhou Li
PLL频率合成器的杂散性能分析
AMBA 4 AXI4-Stream Protocol Specification
ARM Limited
CMOS模拟集成电路设计布局仿真-[..]
射频集成电路与系统
李智群 王志功 编著
A 2.488–11.2 Gb/s multi-protocol SerDes in 40nm low-leakage ...
Socrates D. Vamvakos & Claude R. Gauthier & Chethan Rao & Karthisha Ramoshan Canagasaby & Prashant Choudhary & Sanjay Dabral & Shaishav Desai & Mahmudul Hassan & K.C. Hsieh & Bendik Kleveland & Gurupada Mandal & Richard Rouse & Ritesh Saraf & Alvin Wang & Jason Yeung & Khaldoon Abugharbieh & Ying Cao
IEEE Standard for Ethernet