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一种高精密CMOS带隙基准源王彦

一种高精密CMOS带隙基准源王彦

Design Procedure for Two-Stage CMOS Opamp using gm/ID design Methodology in 16 nm FinFET Technology

Design Procedure for Two-Stage CMOS Opamp using gm/ID design ...

Bakr Hesham & El-Sayed Hasaneen & Hesham F. A. Hamed

控制之美卷1 (王天威) (Z-Library)

控制之美卷1 (王天威) (Z-Library)

Aperture Uncertainty and ADC System Performance Application Note (AN-501)

Aperture Uncertainty and ADC System Performance Application ...

Analog Devices, Inc.

2.7Gbps收发器中LVDS驱动电路的设计

2.7Gbps收发器中LVDS驱动[..]

NONE

NONE

TCASⅡ 202212

TCASⅡ 202212

mssc.2015.The StrongARM Latch

mssc.2015.The StrongARM Latch

模拟CMOS集成电路设计第2版14609998

模拟CMOS集成电路设计第2版14609998

Fundamentals of Digital Logic with Verilog Design, THIRD EDITION

Fundamentals of Digital Logic with Verilog Design, THIRD EDITION

Stephen Brown & Zvonko Vranesic

数字VLSI芯片设计使用Cadence和Synopsys CAD工具

数字VLSI芯片设计使用Cadence和Synopsys CAD工具

艾瑞克·布鲁范德著

HIGH SPEED AND LOW POWER DYNAMIC LATCH COMPARATOR

HIGH SPEED AND LOW POWER DYNAMIC LATCH COMPARATOR

A0130105

A0130105

基于延迟锁相环的时钟发生器设计

基于延迟锁相环的时钟发生器设计

PLL WITH LOW SPURS

PLL WITH LOW SPURS

lnaDesign2

lnaDesign2

Silicon-Germanium Heterojunction Bipolar Transistors (2002)

Silicon-Germanium Heterojunction Bipolar Transistors (2002)

sido buck converter

sido buck converter

Duyu Liu & Xinzhi Liu & Hao Chen & Shouming Zhong

Category: 开本：16开

ANALOG CMOS IC DESIGN 模拟CMOS集成电路设计

ANALOG CMOS IC DESIGN 模拟CMOS集成电路设计

魏廷存 & 陈莹梅 & 胡正飞