高速数字电路设计中信号完整性分析与研究
未知
Analog Design Essentials
sansen
js.2010.PFD biased with shunt regulator
Calibre® DefectReview User's Manual
Siemens Industry Software
25Gbps系统封装和高速互连的信[..]
Dracula Reference
Inc. Cadence Design Sys tems
eetop.cn Matching
Session 6
Python API Reference Manual
Inc. Synopsys
A CMOS Chopper Opamp with Integrated Low-Pass Filter
GPS接收机内带镜像抑制的中频滤波器设计
模拟集成电路分析与设计（第二版）
数值分析
Session 36
Cadence高速电路板设计与仿真 信号与电源完整性分析 第5版
MT-001: Taking the Mystery out of the Infamous Formula,'SNR ...
Walt Kester
SAR ADC和SD ADC设计-工业应用
PrimeSim� XA User Guide
AXI Memory Mapped to PCI Express (PCIe) Gen2 v2.8 LogiCORE IP ...
Xilinx, Inc.
AXI Interconnect v2.1 LogiCORE IP Product Guide (PG059)
JESD204 v7.2 LogiCORE IP Product Guide (PG066)
Xilinx PG153 LogiCORE IP AXI Quad Serial Peripheral Interface ...
Xilinx DS558, LogiCORE IP DDS Compiler v4.0, Data Sheet
Xilinx DS534, FIR Compiler v5.0, Data Sheet