理工书库 lilin | Category: MII

Discover (Random Books)

[Behzad Razavi] Phase-Locking in High-Performance (BookFi)

[Behzad Razavi] Phase-Locking in High-Performance (BookFi)

Embedded Peripherals IP User Guide

Embedded Peripherals IP User Guide

Intel Corporation

ESD Design and Synthesis

ESD Design and Synthesis

ISSC2021 SESSION 2

ISSC2021 SESSION 2

低压高速LDO电路系统的分析与设计

低压高速LDO电路系统的分析与设计

compact trimming design of a high precision reference

compact trimming design of a high precision reference

Microsoft Word - I2C×ÜÏß¹æ·¶.doc

Microsoft Word - I2C×ÜÏß¹æ·¶.doc

Session 16: Computation in Memory

Session 16: Computation in Memory

Session 11V-ADVANCED WIRELINE LINKS AND TECHNIQUES

Session 11V-ADVANCED WIRELINE LINKS AND TECHNIQUES

ISSCC2021-SC3-Clocking, Clock Distribution, and Clock Management in WirelineWireless Subsystems

ISSCC2021-SC3-Clo[..] Clock Distribution, and Clock Management ...

AD9635 cn

AD9635 cn

Session 11: Advanced Wireline Links and Techniques

Session 11: Advanced Wireline Links and Techniques

393747_Print.indd

393747_Print.indd

控制之美卷2

控制之美卷2

Operation and Modeling of the MOS Transistor By Tsividis

Operation and Modeling of the MOS Transistor By Tsividis

Computational electromagnetism variational formulations, complementarity, edge elements by Alain Bossavit, Isaak D. Mayergoyz (z-lib.org)

Computational electromagnetism variational formulations, complementarity, ...

CMOS Fractional-N Synthesizers: Design for High Spectral Purity and Monolithic Integration (The Springer International Series in Engineering and Computer Science)

CMOS Fractional-N Synthesizers: Design for High Spectral Purity ...

Bram De Muer & Michiel Steyaert

Silicon-Germanium Heterojunction Bipolar Transistors (2002)

Silicon-Germanium Heterojunction Bipolar Transistors (2002)

Category: MII

IEEE Standard for Ethernet

IEEE Standard for Ethernet