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Discover (Random Books)

控制之美(卷1)——控制理论从传递函数到状态空间

控制之美(卷1)——控制理论从传递[..]

王天威

带隙基准电路的研究

带隙基准电路的研究

<CCC6B3A4CEC4>

电源芯片中CMOS带隙基准源与微调的设计与实现 (1)

电源芯片中CMOS带隙基准源与微调[..] (1)

未知

Session 20: High-Performance VCOs

Session 20: High-Performance VCOs

未知

一种具有温度补偿 高电源抑制比的带隙基准源 何捷

一种具有温度补偿 高电源抑制比的带隙基准源 何捷

未知

Session 32: Frequency Synthesizers

Session 32: Frequency Synthesizers

未知

集成电路静态时序分析与建模

集成电路静态时序分析与建模

刘峰编著

Universal Verification Methodology (UVM) Cookbook

Universal Verification Methodology (UVM) Cookbook

Functional Verification Methodology Team - Mentor & A Siemens Business

RF Circuit Design (Information and Communication Technology Series,)

RF Circuit Design (Information and Communication Technology ...

Richard C. Li

EE214: Analog Integrated Circuit Design

EE214: Analog Integrated Circuit Design

murmann

Precise delay generation using coupled oscillators

Precise delay generation using coupled oscillators

J.G. Maneatis & M.A. Horowitz

2-Stage OTA Design

2-Stage OTA Design

未知

基于CMOS工艺的ESD器件及全芯片防护设计

基于CMOS工艺的ESD器件及全芯[..]

PLJIE

Embedded Peripherals IP User Guide

Embedded Peripherals IP User Guide

Intel Corporation

Introduction to RF Power Amplifier Design and Simulation (Abdullah E.) (Z-Library)

Introduction to RF Power Amplifier Design and Simulation (Abdullah ...

未知

CMOS DLL-based 2-V 3.2-ps jitter 1-GHz clock synthesizer and temperature-compensated tunable oscillator

CMOS DLL-based 2-V 3.2-ps jitter 1-GHz clock synthesizer and ...

D.J. Foley;M.P. Flynn

Front Matter

Front Matter

SHANTHI PAVAN, RICHARD SCHREIER & GABOR C. TEMES

A compact power-efficient 3 V CMOS rail-to-rail input/output operational amplifier for VLSI cell lib - Solid-State Circuits, IEEE Journal of

A compact power-efficient 3 V CMOS rail-to-rail input/output ...

IEEE

Category: Vivado

PCI Express PHY v1.0 LogiCORE IP Product Guide

PCI Express PHY v1.0 LogiCORE IP Product Guide

Xilinx, Inc.

Vivado Design Suite User Guide: Logic Simulation (UG900)

Vivado Design Suite User Guide: Logic Simulation (UG900)

Xilinx, Inc.

AXI Memory Mapped to PCI Express (PCIe) Gen2 v2.8 LogiCORE IP Product Guide (PG055)

AXI Memory Mapped to PCI Express (PCIe) Gen2 v2.8 LogiCORE IP ...

Xilinx, Inc.

AXI Interconnect v2.1 LogiCORE IP Product Guide (PG059)

AXI Interconnect v2.1 LogiCORE IP Product Guide (PG059)

Xilinx, Inc.

JESD204 v7.2 LogiCORE IP Product Guide (PG066)

JESD204 v7.2 LogiCORE IP Product Guide (PG066)

Xilinx, Inc.

Xilinx PG153 LogiCORE IP AXI Quad Serial Peripheral Interface (SPI) v3.1, Product Guide

Xilinx PG153 LogiCORE IP AXI Quad Serial Peripheral Interface ...

Xilinx, Inc.

Book Details

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