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Discover (Random Books)

Enhanced phase noise modeling of fractional-N frequency synthesizers

Enhanced phase noise modeling of fractional-N frequency synthesizers

H. Arora;N. Klemmer;J.C. Morizio;P.D. Wolf

Modeling Jitter in PLL-based Frequency Synthesizers

Modeling Jitter in PLL-based Frequency Synthesizers

Ken Kundert

微波工程 (第3版)

微波工程 (第3版)

(美)DAVID M.POZAR著 张肇仪 周乐柱 吴德明等译

CN104977963A-兆易创新-一种无运放低功耗高电源抑制比的带隙基准

CN104977963A-兆易创新[..]

未知

AMBA AXI Protocol Specification

AMBA AXI Protocol Specification

ARM Limited

Computer Arithmetic - Algorithms and Hardware Designs

Computer Arithmetic - Algorithms and Hardware Designs

Parhami

高速数字电路设计中信号完整性分析与研究

高速数字电路设计中信号完整性分析与研究

未知

DCDC变换器工作原理及设计

DCDC变换器工作原理及设计

MPS

Cadence Physical Verifi cation User Guide

Cadence Physical Verifi cation User Guide

Inc. Cadence Design Sys tems

数字调制解调技术的MATLAB与FPGA实现 Altera Verilog版 杜勇编著

数字调制解调技术的MATLAB与F[..] Altera Verilog版 杜勇编著

未知

集成电路掩模设计-基础版图技术

集成电路掩模设计-基础版图技术

未知

CMOS模拟集成电路设计与仿真实例——基于Cadence ADE

CMOS模拟集成电路设计与仿真实例[..] ADE

未知

New developments in IC voltage regulators

New developments in IC voltage regulators

R.J. Widlar

Avalon Tri-state Conduit Components User Guide

Avalon Tri-state Conduit Components User Guide

Altera Corporation

ISSCC2021-T1-Fundamentals of RF and Mm-Wave Power Amplifier Designs

ISSCC2021-T1-Fund[..] of RF and Mm-Wave Power Amplifier Designs

未知

开关电容电路 从入门到精通

开关电容电路 从入门到精通

未知

Session 24

Session 24

未知

CMOS射频集成电路分析与设计 (池保勇, 余志平, 石秉学) (z-lib.org)

CMOS射频集成电路分析与设计 (池保勇, 余志平, 石秉学) (z-lib.org)

未知

Category: This core implements a JESD204B interface supporting a line rate of up to 12.5 Gb/s on 1- 12 lanes using GTX or GTH transceivers in Zynq-7000 AP SoC devices

JESD204 v7.2 LogiCORE IP Product Guide (PG066)

JESD204 v7.2 LogiCORE IP Product Guide (PG066)

Xilinx, Inc.

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