Triple-Speed Ethernet Intel® FPGA IP User Guide
Intel Corporation
A 76 dB 1.7 GHz 0.18 m CMOS Tunable TIA Using Broadband Current ...
Hossein Miri Lavasani & Wanling Pan & Brandon Harrington & Reza Abdolvand & Farrokh Ayazi
A comparative study of various current mirror configurations_ ...
Bhawna Aggarwal & Maneesha Gupta & A.K. Gupta
Operation and Modeling of the MOS Transistor By Tsividis
未知
CMOS 带隙基准源研究-tangzhangwen
zwtang
模拟集成电路设计精粹——Analog Design Essentials
Willy M.C. Sansen 著 & 陈莹梅 译 & 王志功 审校
DIFFERENTIAL EQUATIONS WITH APPLICATIONS AND HISTORICAL NOTES
George F. Simmons
一种大电流LDO稳压器的设计
A Low Power Two Stages CMOS OpAmp
Nonlinear Hybrid Continuous/Discre[..] Models (Atlantis Studies ...
Marat Akhmet
Modified modeling of Miller compensation for two-stage operational ...
H.C. Yang;D.J. Allstot
芯片I／O缓冲及ESD电路设计
模拟CMOS电路设计折中与优化
A 3.3-V 12-b 50-MS/s A/D converter in 0.6-/spl mu/m CMOS with ...
IEEE
3P-EBK: CALCULUS EARLY TRANSCENDENTALS
Advanced Computational Electromagnetic Methods and Applications
Yu, Li, Elsherbeni, Rahmat-Samii, Editors
模拟电路设计——鲁棒性设计、Sig[..] (模拟电路设计——鲁棒性设计、Si[..] (z-lib.org)
作者
带隙基准电路的研究
<CCC6B3A4CEC4>
Embedded Peripherals IP User Guide